zapping gates

[John Larkin]

OK.
a) Destructive or non-destructive test.

Mosfet gate breakdown? You've got to be kidding.

b) Proper control of dv/dt and definition what di/dt is defined as
breakdown.

You *are* kidding, right?

c) Manufacturer definitions of error levels on number(s) given in specs
sheet.

Take a look at the datasheets in question; the numbers are in the "abs
max" section. Take a look at their detailed methodology, dv/dt,
definition of breakdown; there ain't any.

And so on and on.

I get *that* part loud and clear.

All this is done so there is "No Entry!" sign for Mr.Murphy and his helpers.

I blew up one fet, and I let my customer, who was visiting, blow up
the other one. A good time was had by all, and we immediately
discounted one proposed failure mechanism.

And it IS a branch in our industry, not cheap, but essential.

We needed data in 5 minutes, and I got it. I'm glad I didn't
commission a team of "testing professionals" to measure these numbers;
they would have needed a budget, a test plan, a test fixture, a test
data sheet, an environmental chamber, a datalogger, an engineer and
three techs, a few meetings, a statistical analysis package, and six
months. And, in my experience, would have connected the fet wrong and
got nonsense data.

Have fun

Always!

John

 

[Stanislaw Flatto]

Mosfet gate breakdown? You've got to be kidding.

Am I? Have you met a component which fails in "one and only" way in all
places of usage?

Take a look at the datasheets in question; the numbers are in the "abs
max" section. Take a look at their detailed methodology, dv/dt,
definition of breakdown; there ain't any.

Must be something special, "new, improved, buy it today!", a gate with
conductors on two sides of insulator which has NO capacitive effects at
any frequency.

We needed data in 5 minutes, and I got it. I'm glad I didn't
commission a team of "testing professionals" to measure these numbers;
they would have needed a budget, a test plan, a test fixture, a test
data sheet, an environmental chamber, a datalogger, an engineer and
three techs, a few meetings, a statistical analysis package, and six
months. And, in my experience, would have connected the fet wrong and
got nonsense data.

Been there, done it. So is life, what can be done?

 

[legg]

Well, I connected a power supply between gate and source and turned it
up until the gate blew out... is there another way? Gate was + on the
n-channel fet, - on the p-gadget, which ensured that Vd-s was zero.

So, a failure mode that we thought was possible, isn't. Gotta look
somewhere else.

Just so long as your test procedure duplicated the environment of the
failure mode being chased, and included a sufficient sample base to
duplicate the rate of failures in evidence.

RL

 

[John Larkin]

I don't quite know how this thread went bad. To me, it was a very
interesting post.

Since I've never done anything like this, I was just curious about how one
detects blowout.

Does the current jump up dramatically?

Yes. The gate oxide punches through, and then you can push as much
current as the wirebonds can handle.

Does the part make an audible pop?

No, not unless a huge amount of energy is available, in which case you
get shrapnel. Serious SOA testing *does* make shrapnel.

I'm sure you had the current limiting set up on the PS, so maybe the
Voltage just drops off suddenly as the current limit kicks in?

I put a Fluke ammeter in series, but it's not necessary... the gate
shorts the supply, it current limits, and voltage drops to near zero.

I thought the numbers were interesting, and thought others might have
data on other parts. I didn't expect to get ragged over methodology,
especially from a bunch of people who sound like armchair engineers.

John

 

[Richard Henry]

Yes. The gate oxide punches through, and then you can push as much
current as the wirebonds can handle.


No, not unless a huge amount of energy is available, in which case you
get shrapnel. Serious SOA testing *does* make shrapnel.


I put a Fluke ammeter in series, but it's not necessary... the gate
shorts the supply, it current limits, and voltage drops to near zero.

I thought the numbers were interesting, and thought others might have
data on other parts. I didn't expect to get ragged over methodology,
especially from a bunch of people who sound like armchair engineers.

I admit I am sitting in my armchair. I don't see why asking for more data
should be offensive.

 

[John Larkin]

I admit I am sitting in my armchair. I don't see why asking for more data
should be offensive.

Not offensive, just very, very silly. I mean, I told everybody exactly
what I did, like turning the pot on the power supply and reading the
meter, and then people ask me stuff like what kind of supply I used,
and how many volts/ns were applied.

Nobody has, of course, presented *any* other data. That would require
actual interest or actual activity. In the "led as photodector"
thread, a few people actually got off their butts and produced some
numbers.

John

 

[Richard Henry]

Not offensive, just very, very silly. I mean, I told everybody exactly
what I did, like turning the pot on the power supply and reading the
meter, and then people ask me stuff like what kind of supply I used,
and how many volts/ns were applied.

Nobody has, of course, presented *any* other data. That would require
actual interest or actual activity. In the "led as photodector"
thread, a few people actually got off their butts and produced some
numbers.

If I were to try to produce some other numbers, I would try to imitate as
closely as possible your test setup and method. Thus the questions.

Also, if I were to get different numbers, I would look for differences
intest setup or method as the first step to resolving the differences.

 

[Genome]

We just tested the gate blowout voltage of a couple of 500-volt,
300-watt power fets:

IXYS IXTH11P50 p-channel 80 volts
IR IRFPS37N50A n-channel 115 volts

John

You might have had some mong over this but you are being a bit 'stupid'.

Simple answer is manufacturers 'characterise' on the basis of their
processes.

Your absolute maximum gate voltage might be +/-20V. As a result Mr
manufacturer might be able to shove 100% of product through the gate........
without testing. Even then he will probably also accept some statistical sum
of failures as long as they are acceptable.

Of course, you.... as 'Mr stupid'.... might have some failure mode you are
thinking about. Let's say there is a possibility that your circuit, for some
reason might overvoltage the gate.

You get two choices.

Either sort out your gate drive circuit so it will not overvoltage the gate.

or

'Qualify' the mosfets you buy from the manufacturer and use in your product
to demonstrate that the ones that you 'select' will be reliable in the
intended application.

You appear to have used choice three, which does not exist.

Call the (thick) customer in and demonstrate how two mosfets will work in
the circuit you have designed.

Obviously, since the contract is worth $50,000, there is absolutely no way
you would have burned up $500 worth of mosfets to find the two that would
work in your circuit with the percieved failure mode.

DNA

 

[Joerg]

Hello John,

We needed data in 5 minutes, and I got it. I'm glad I didn't
commission a team of "testing professionals" to measure these numbers;
they would have needed a budget, a test plan, a test fixture, a test
data sheet, an environmental chamber, a datalogger, an engineer and
three techs, a few meetings, a statistical analysis package, and six
months. And, in my experience, would have connected the fet wrong and
got nonsense data.

"the fet"? It would have to be "the fets" and probably a few hundred
times x different batch numbers. To the tune of $10 each or so. It'll
only be an additional $50k, or maybe $100k, nothing compared to the guy
who had his Lamborghini nailed to the wall (did you read that one?).

Anyway, thank for sharing. Wouldn't have thought a FET could stomach
four times abs max. Wow.

Regards, Joerg

 

[Spehro Pefhany]

You might have had some mong over this but you are being a bit 'stupid'.

Simple answer is manufacturers 'characterise' on the basis of their
processes.

Your absolute maximum gate voltage might be +/-20V. As a result Mr
manufacturer might be able to shove 100% of product through the gate........
without testing. Even then he will probably also accept some statistical sum
of failures as long as they are acceptable.

Of course, you.... as 'Mr stupid'.... might have some failure mode you are
thinking about. Let's say there is a possibility that your circuit, for some
reason might overvoltage the gate.

You get two choices.

Either sort out your gate drive circuit so it will not overvoltage the gate.

or

'Qualify' the mosfets you buy from the manufacturer and use in your product
to demonstrate that the ones that you 'select' will be reliable in the
intended application.

You appear to have used choice three, which does not exist.

Call the (thick) customer in and demonstrate how two mosfets will work in
the circuit you have designed.

Obviously, since the contract is worth $50,000, there is absolutely no way
you would have burned up $500 worth of mosfets to find the two that would
work in your circuit with the percieved failure mode.

DNA

Without going back and re-reading the beginning of the thread, it
sounded more like he had a small number of unexplained failures on an
existing product and trying to rule out or rule in gate overvoltage as
a possible cause. Checking the 'typical' failure voltage is a
perfectly valid approach under those conditions, no?


Best regards,
Spehro Pefhany

 

[Genome]

Without going back and re-reading the beginning of the thread, it
sounded more like he had a small number of unexplained failures on an
existing product and trying to rule out or rule in gate overvoltage as
a possible cause. Checking the 'typical' failure voltage is a
perfectly valid approach under those conditions, no?


Best regards,
Spehro Pefhany

Err, no... don't bend my head... go back and read the whole.

Perhaps John was just testing.

DNA

 

[Mac]

On Sun, 14 May 2006 08:54:26 -0700, John Larkin wrote:

[snip]

I thought the numbers were interesting, and thought others might have
data on other parts. I didn't expect to get ragged over methodology,
especially from a bunch of people who sound like armchair engineers.

Amen. Let them go frag their own FET's. ;-)

John

--Mac

 

[John Larkin]

Call the (thick) customer in and demonstrate how two mosfets will work in
the circuit you have designed.

Obviously, since the contract is worth $50,000,

About $900,000 so far, and sales are picking up.

John

 

[Genome]

About $900,000 so far, and sales are picking up.

John

Hmmm.... you appear to have a locked creativity problem.

Look for other avenues. (I have no suggestions.... other than a hairy single
seater flying thing)

DNA

 

[Fritz Schlunder]

We just tested the gate blowout voltage of a couple of 500-volt,
300-watt power fets:

IXYS IXTH11P50 p-channel 80 volts
IR IRFPS37N50A n-channel 115 volts

John

For those who are interested in this topic, it may be of value to read this
document:

http://www.irf.com/technical-info/appnotes/an-986.pdf

In particular section III. "Experimental verification" under the
observations 1. and 3. will be of interest. Basically they claim standard
gate MOSFETs typically are destroyed around 70-80V, with logic level devices
around 45V-50V. Additionally, if gate avalanche currents are limited to a
very small level (IE: <100uA) the gates don't seem to be immediately
destroyed. I've seen this basic data also claimed in at least one other
document from International Rectifier, but unfortunately I can't remember
exactly what document that was in.

John's IRFPS37N50A 115V figure is entirely believable and probably not at
all unusual for MOSFETs with datasheet absolute maximum gate ratings of
+/-30V. For absolute maximum rated +/-20V devices, I would expect 80V
breakdown to be more typical.

Manufacturers benefit in more than one way by producing datasheets with very
conservative maximum gate voltage ratings. In particular, devices will
still be more reliable at lower gate voltage (especially over the long run),
and it will help to improve product yield. For example, if during the
manufacturing process a tiny fleck of dust were to land on a MOSFET while
the gate oxide is being grown, it would no doubt introduce a gate oxide
imperfection that would reduce the gate breakdown voltage (though not
necessarily enough to make the device useless). For example, suppose the
imperfection reduces the breakdown voltage from 80V down to 40V. The device
can still be sold if the datasheet specifies 20V abs. max voltage, but it
could not be sold if the datasheet specified 60V absolute max.

Additionally, there is essentially no benefit (in terms of on resistance or
maximum current handling ability) for driving MOSFET gates beyond 20V, or
even 15V for that matter, for typical MOSFETs (there are some that still
benefit a little, but most don't). For the most part the on resistance and
maximum current capability with Vgs at 10V is essentially very nearly as
good as it will get regardless of how high a voltage you apply.

 

[Mike Monett]

For those who are interested in this topic, it may be of value to read
this document:

http://www.irf.com/technical-info/appnotes/an-986.pdf

Interesting - Thanks for posting this info.

How do you get the figures to show? I tried Acrobat 5.0 and Foxit, and
neither showed any images. The pdf header says it is "PDF-1.3", which
I believe means it is version 4.0 so any viewer should work fine.

What's the trick?

Regards,

Mike Monett

 

[Terry Given]

For those who are interested in this topic, it may be of value to read this
document:

http://www.irf.com/technical-info/appnotes/an-986.pdf

In particular section III. "Experimental verification" under the
observations 1. and 3. will be of interest. Basically they claim standard
gate MOSFETs typically are destroyed around 70-80V, with logic level devices
around 45V-50V. Additionally, if gate avalanche currents are limited to a
very small level (IE: <100uA) the gates don't seem to be immediately
destroyed. I've seen this basic data also claimed in at least one other
document from International Rectifier, but unfortunately I can't remember
exactly what document that was in.

John's IRFPS37N50A 115V figure is entirely believable and probably not at
all unusual for MOSFETs with datasheet absolute maximum gate ratings of
+/-30V. For absolute maximum rated +/-20V devices, I would expect 80V
breakdown to be more typical.

Manufacturers benefit in more than one way by producing datasheets with very
conservative maximum gate voltage ratings. In particular, devices will
still be more reliable at lower gate voltage (especially over the long run),
and it will help to improve product yield. For example, if during the
manufacturing process a tiny fleck of dust were to land on a MOSFET while
the gate oxide is being grown, it would no doubt introduce a gate oxide
imperfection that would reduce the gate breakdown voltage (though not
necessarily enough to make the device useless). For example, suppose the
imperfection reduces the breakdown voltage from 80V down to 40V. The device
can still be sold if the datasheet specifies 20V abs. max voltage, but it
could not be sold if the datasheet specified 60V absolute max.

Additionally, there is essentially no benefit (in terms of on resistance or
maximum current handling ability) for driving MOSFET gates beyond 20V, or
even 15V for that matter, for typical MOSFETs (there are some that still
benefit a little, but most don't). For the most part the on resistance and
maximum current capability with Vgs at 10V is essentially very nearly as
good as it will get regardless of how high a voltage you apply.

there will be a gaussian distribution hiding in there too.

back when my employer used to give Hitachi AIC $1,500,000 per year, we
got ALL of the factory data. spec'd lifetime is -3 standard deviations;
mean lifetime was 2x rated lifetime.

Cheers
Terry

 

[Mike Monett]

I don't think they're in there.

Best regards,
Spehro Pefhany

I didn't think so either, but ya gotta be careful making hard and fast
statements with this bunch. Someone (usually with the initials S.P.) will
often post a reply to the effect you need to click on a hidden icon in the
upper right corner, which opens a new menu, and so forth.

So I tend to weasel-word my posts as much as possible

Regards,

Mike Monett

 

[Spehro Pefhany]

Interesting - Thanks for posting this info.

How do you get the figures to show? I tried Acrobat 5.0 and Foxit, and
neither showed any images. The pdf header says it is "PDF-1.3", which
I believe means it is version 4.0 so any viewer should work fine.

What's the trick?

Regards,

Mike Monett

I don't think they're in there.


Best regards,
Spehro Pefhany

 

[Mike Monett]

I blew up one fet, and I let my customer, who was visiting, blow up
the other one. A good time was had by all, and we immediately
discounted one proposed failure mechanism.

So can you give us more info on the failure and any idea what caused the
problem? Maybe ESD during handling? I understand this can cause a latent
defect that fails later in service.

Regards,

Mike Monett