Sort of Gray code to binary converter

[Jim Thompson]

[...]

I've got you very beat on chip count but mine are higher level chips.
See my post elsewhere in this thread.

How about comparing solutions on the basis of equivalent number of
gates? Obviously an ASIC could be built to do this job, but the
puzzle, as an intellectual exercise, is more interesting if you place
complexity limitations on the solution.

(For a practical solution I would just program a PIC.)

A PIC has a really huge number of gates inside. Personally, I'd more
likely put it into a CMOS 22V10. Both you and my practical solutions
contain more logic than the ones we are comparing.

A real contest would be to do it in terms of transistors.

--

Can I do it all in 2N2222 ?

...Jim Thompson

 

[Ken Smith]

Well so far we've got quite a plethora of answers. Ken seems to be
ahead of the field in the hardware stakes, although he's keeping the
design under wraps just now ;-).

Actually, no it isn't under wraps. The only thing I didn't say was the
obvious. Take a look at my first post on the subject where I said that it
takes a priority decoder+parity generator+quad nand. I gave what each
does.

I like the 16V8 or 22V10 PLD approach
and that could yet creep to the front of the field.

This would be my vote.

well. So we're probably looking at 'C' on an AVR as the front runner.

Anything involving "C" makes me ill.

Look-up tables are too wasteful

If the chip you use has the code space needed, you may as well go that
way. You can't save the unused part of the prom for use in some future
chip.

and if(); else if() or switch{}
contructs are too ugly so let's have some lateral thinking.

If your CPU does floating point with the IEEE format:

Assume that EXP returns the exponent part of the number.
Assume that MAN returns the mantissa part of the number without the
implied bit.

if ( X == 0x81) Y = SOMEVALUE
else {
TempFloat = X
Y = (2 * EXP(TempFloat)) + ( 1 & (0 < MAN(TempFloat)));
}

 

[Fred Bloggs]

Yes.
Get one of the "zero power" ones and you can run it for a couple of years
on a 9V battery.

The decode boils down to two groups of 4-bits and that can be done with
a single dual quad-input mux for 4 data I and one mux select output O.
Most u's should have a count ones instruction so jump out on error for
sum >2 on both nibbles or 0 on both. From that point he has a simple
4-bit decode which is 1/16 the loading of a full 8-bit decode. This
reduces complexity in the same way as a matrix decoder reduces an MxN
decode into an M+N burden.

 

[Robert Scott]

A PIC has a really huge number of gates inside. Personally, I'd more
likely put it into a CMOS 22V10. Both you and my practical solutions
contain more logic than the ones we are comparing.

A real contest would be to do it in terms of transistors.

As it stands, the contest is not well-defined. I mentioned the PIC
solution not as a solution to the contest, but what I would use if I
just had to do the job.

But I haven't seen any other claim of a solution with the 27 gates in
my solution:


-Robert Scott
Ypsilanti, Michigan

 

[Richard Henry]

As it stands, the contest is not well-defined. I mentioned the PIC
solution not as a solution to the contest, but what I would use if I
just had to do the job.

But I haven't seen any other claim of a solution with the 27 gates in
my solution:

Only for sufficiently-liberal definition of "gate". Or do you consider the
8-input nand-gate to be the equivalent of an '04 inverter? If so, I propose
to program a PAL16CV8 with the solution and relabel it as an AG3927
Weathervane Gate.

 

[Spehro Pefhany]

On Mon, 12 Dec 2005 14:48:42 +0000 (UTC), the renowned

[...]

I've got you very beat on chip count but mine are higher level chips.
See my post elsewhere in this thread.

How about comparing solutions on the basis of equivalent number of
gates? Obviously an ASIC could be built to do this job, but the
puzzle, as an intellectual exercise, is more interesting if you place
complexity limitations on the solution.

(For a practical solution I would just program a PIC.)

A PIC has a really huge number of gates inside. Personally, I'd more
likely put it into a CMOS 22V10. Both you and my practical solutions
contain more logic than the ones we are comparing.

What do you guys use to write programs for the SPLDs? CUPL?

A real contest would be to do it in terms of transistors.

One way is to just decode the valid states (8 inverters and 8 2-input
AND gates) and use a handful of diodes to generate the binary. That's
perhaps 8 NPN transistors, a couple of dozen resistors, and 48 diodes
(HCMOS input and output).


Best regards,
Spehro Pefhany

 

[Luhan Monat]

[...]

I've got you very beat on chip count but mine are higher level chips.
See my post elsewhere in this thread.

How about comparing solutions on the basis of equivalent number of
gates? Obviously an ASIC could be built to do this job, but the
puzzle, as an intellectual exercise, is more interesting if you place
complexity limitations on the solution.

(For a practical solution I would just program a PIC.)

A PIC has a really huge number of gates inside. Personally, I'd more
likely put it into a CMOS 22V10. Both you and my practical solutions
contain more logic than the ones we are comparing.

A real contest would be to do it in terms of transistors.

--

Can I do it all in 2N2222 ?

...Jim Thompson

How about some mind-numbing array of diodes?

 

[Jim Thompson]

[...]

I've got you very beat on chip count but mine are higher level chips.
See my post elsewhere in this thread.

How about comparing solutions on the basis of equivalent number of
gates? Obviously an ASIC could be built to do this job, but the
puzzle, as an intellectual exercise, is more interesting if you place
complexity limitations on the solution.

(For a practical solution I would just program a PIC.)

A PIC has a really huge number of gates inside. Personally, I'd more
likely put it into a CMOS 22V10. Both you and my practical solutions
contain more logic than the ones we are comparing.

A real contest would be to do it in terms of transistors.

--

Can I do it all in 2N2222 ?

...Jim Thompson

How about some mind-numbing array of diodes?

Relays ?

...Jim Thompson

 

[Rick]

[...]

I've got you very beat on chip count but mine are higher level chips.
See my post elsewhere in this thread.

How about comparing solutions on the basis of equivalent number of
gates? Obviously an ASIC could be built to do this job, but the
puzzle, as an intellectual exercise, is more interesting if you place
complexity limitations on the solution.

(For a practical solution I would just program a PIC.)

A PIC has a really huge number of gates inside. Personally, I'd more
likely put it into a CMOS 22V10. Both you and my practical solutions
contain more logic than the ones we are comparing.

A real contest would be to do it in terms of transistors.

--


Can I do it all in 2N2222 ?

...Jim Thompson

How about some mind-numbing array of diodes?

Relays ?

...Jim Thompson

Spare parts from a Friedan mechanical calculator....

 

[Rich Webb]

On Mon, 12 Dec 2005 11:13:09 -0500, Spehro Pefhany

[snip...snip...]

What do you guys use to write programs for the SPLDs? CUPL?

Atmel's free-for-download WinCUPL. (Very) occasionally VHDL but somehow
the CUPL syntax "feels better" for those very small devices.

http://www.atmel.com/dyn/products/tools_card.asp?tool_id=2759

 

[Rich Webb]

Well so far we've got quite a plethora of answers.

[snip...snip...]

Good thread.

One thing to keep in mind is that exporting the conversion to an
off-board device, like a GAL, loses the benefit of having only one bit
change per sector transition. I'd be awfully tempted to keep the eight
data lines separate until they reached the data logger/display.
Otherwise, consider adding a data-valid pulse (with the accompanying
need for setup and hold times) or do the tell-me-three-times routine.

Alternately, sample all the parameters at the sensor head (including,
perhaps, wind speed, temperature, humidity, ...) and squirt the whole
data packet as a serial bitstream.

 

[John B]

On 12/12/2005 the venerable Rich Webb etched in runes:

<snip>

Atmel's free-for-download WinCUPL. (Very) occasionally VHDL but
somehow the CUPL syntax "feels better" for those very small devices.

http://www.atmel.com/dyn/products/tools_card.asp?tool_id=2759

I've actually got a real copy of Logical Devices' WinCupl 5.0. I think
they went to the wall a few years ago. WinCupl's a bit flaky but does
cope with the 26V12 which I used to use a lot. The Atmel free version
is only CUPL 4 and doesn't stretch to the 26V12. That's probably
because only AMD and Lattice ever made them.

There's also ispLEVER which is a free download from Lattice
http://www.latticesemi.com/products/designsoftware/index.cfm It's *big*
and not so easy to use as CUPL.

 

[Winfield Hill]

John B wrote...

the venerable Rich Webb etched in runes:
<snip>


I've actually got a real copy of Logical Devices' WinCupl 5.0. I think
they went to the wall a few years ago. WinCupl's a bit flaky but does
cope with the 26V12 which I used to use a lot. The Atmel free version
is only CUPL 4 and doesn't stretch to the 26V12. That's probably
because only AMD and Lattice ever made them.

With ABEL locked up in Xilinx' hands (even if still available in
Foundation and WebPak, with fitters for their parts), we're having
to once again consider CUPL. For example, Atmel's venerable V750
and V2500. Both were favorites of mine for their logical power and
for their low power, , and were upgraded a few years ago to the
ATF750CL and ATF2500C series (still available in DIP, yeah!). These
are attractive parts that demand the use of Atmel's free CUPL.

 

[Ken Smith]

What do you guys use to write programs for the SPLDs? CUPL?

I have a program from ICT called Place. This is a MS-DOS program. Of all
the programs for doing a 22V10, it is by far the best.

It has a semi-GUI for clicking the various options on the macro-cell
configuration. The langage is very much like ABEL for entering the
equations.

Unfortunately two bad things have happened. ICT sold off their SPLD stuff
to Anachip and they did a poor job of porting Place to windows.

ICT had some very nice stuff. They made a thing like a 22V22 where all of
the pins had macro-cells connected to them. They also let you shift the
flip-flop to latching the input. This all fit in the space of a normal
22V10.

One way is to just decode the valid states (8 inverters and 8 2-input
AND gates) and use a handful of diodes to generate the binary. That's
perhaps 8 NPN transistors, a couple of dozen resistors, and 48 diodes
(HCMOS input and output).

If the input lines have any drive, you can do this:



One Bit ------------
!
!!-
Another bit ------!!- N-MOS
!!-----------------To diode array



--- If the inputs swing 5V can get the LSB like this ---

\
/
\ 10K
10K /
R-pack ! HC04
-/\/\-- +--!>o----
-/\/\--+ !/
-/\/\--+----+------! Si NPN eg: 2N2222
5 more ! !\e
resistors / !
\ GND
/
\ 3.32K
!
GND

5/11 = 0.455 Safely off

2*5/11 = 0.91 On enough

 

[Ken Smith]

Alternately, sample all the parameters at the sensor head (including,
perhaps, wind speed, temperature, humidity, ...) and squirt the whole
data packet as a serial bitstream.

You can make it tell you on demand with very little hardware. You send a
character like 55H to it and it uses the edges to clock the bits back to
you.

S 0 1 2 3 4 5 6 7
-- -- -- -- --
---- -- -- -- -- -------

You need some oneshotting to reset the state between characters.

State.R = SomeRC;
State.CLK = !Sin;
.... stuff ...

Sout = Sin # ( Bit0 & (State == 1)
#Bit1 & (State == 2)
#Bit2 & (State == 3)
#Bit3 & (State == 4));

.... more stuff ...

Since you already needed to tranlate codes, this doesn't add much to the
software task.

If yor really want a complex Mickey-Mouse system, you can use the
recieving of 00H to reset the state and put in a lot more states to send a
lot more bits. An modest CPLD can MUX a lot of data onto a serial port
this way.

 

[John Larkin]

I have a program from ICT called Place. This is a MS-DOS program. Of all
the programs for doing a 22V10, it is by far the best.

I still use the Gould AMI/ICT "Peel" software to program 18CV8's and
22CV10's. It's an old dawg dos thing, still works fine.

John

 

[Tony Williams]

The software field is more open. Several people had suggested a
PIC, that's definitely not in the field as the hardware is tooo..
ugly! Now an AVR, yes that's a goer, but not in assembler as that
is ugly as well. So we're probably looking at 'C' on an AVR as
the front runner. Look-up tables are too wasteful and if(); else
if() or switch{} contructs are too ugly so let's have some
lateral thinking.

It's a 1-chip and 2/3 component solution.

An 18-pin PIC gives the required 8+4 i/o, plus either
a 3-pin ceramic resonator, or running in RC mode.
A simple linear 16x comparings code would probably be
less than 100 instructions.

 

[Spehro Pefhany]

It's a 1-chip and 2/3 component solution.

An 18-pin PIC gives the required 8+4 i/o, plus either
a 3-pin ceramic resonator, or running in RC mode.
A simple linear 16x comparings code would probably be
less than 100 instructions.

The midrange PIC doesn't have a compare instruction, but there's a
trick where you XOR a literal based on the previous set of XORs to
give zero when you get the desired match.

Eg.

; input port in w, return result in w, 0xFF for invalid input
convert:
xorlw 0x01
btfsc STATUS,Z
retlw 0x00
xorlw (0x3 ^ 0x01)
btfsc STATUS,Z
retlw 0x01
xorlw (0x2 ^ 0x03)
...
xorlw (0x81 ^ 080)
btfsc STATUS,Z
retlw 0x0F
retlw 0xFF

Should run in 55 or 60 microseconds port-to-port in a 4MHz PIC running
of the internal 4MHz RC (no external parts).

Or use an FPGA with a few lines of HDL and get ~10ns pin-to-pin for
those fast-changing wind directions. ;-)


Best regards,
Spehro Pefhany

 

[John Larkin]

The midrange PIC doesn't have a compare instruction, but there's a
trick where you XOR a literal based on the previous set of XORs to
give zero when you get the desired match.

Eg.

; input port in w, return result in w, 0xFF for invalid input
convert:
xorlw 0x01
btfsc STATUS,Z
retlw 0x00
xorlw (0x3 ^ 0x01)
btfsc STATUS,Z
retlw 0x01
xorlw (0x2 ^ 0x03)
...
xorlw (0x81 ^ 080)
btfsc STATUS,Z
retlw 0x0F
retlw 0xFF

Should run in 55 or 60 microseconds port-to-port in a 4MHz PIC running
of the internal 4MHz RC (no external parts).

Or use an FPGA with a few lines of HDL and get ~10ns pin-to-pin for
those fast-changing wind directions. ;-)


Best regards,
Spehro Pefhany

Good grief, what an instruction set! How do you pronounce "btfsc" or
"xorlw"?

John

 

[Paul Burke]

Good grief, what an instruction set! How do you pronounce "btfsc" or
"xorlw"?

Branch on Too F***ing Scared to Continue.

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