D
D Yuniskis
Hi,
Of course, this is *highly* subjective -- but, I'd enjoy hearing
folks' "conventions" used when preparing schematics (that *others*
will consume -- how you scribble for your own purposes isn't
important as it depends a lot on what *you* want out of the
drawing).
I try to follow some general rules -- but also feel free to bend
them as needed. Most have evolved over the years from different
employers, standards, experience, etc.
E.g., I *tend* to prefer landscape orientation -- though I
drew a B size "portrait" this morning in lieu of a C size
landscape.
I try to include a block diagram of any "sizable" design early
in the document. I try to draft the individual pages so that
they roughly correspond with the blocks in that diagram.
I prefer spreading things over one sheet instead of trying to cram
everything onto one sheet -- unless the design is small enough
to do so without making that sheet cluttered. I.e., it is easier
to trace a signal on a single sheet than to have to flip to
another sheet; but, if there is a ratsnest of signals on that
one sheet, then tracing the signal can be perilous.
Smallest page size to realistically support the design subject
to the remainder of these criteria. E.g., sure, you can fit
everything on an E-size drawing, but reproducing that drawing
(either full size or in "published" documentation) and *using*
that drawing become a real PITA!
[I vacillate between preferring B or C size drawings. C is nice
in that it reduces to A nicely (i.e., with the same aspect ratio)
OTOH, B is nice because reducing to A leaves room along the
binding edge -- which must be located "above" the drawing! -- for
three hole punch *or* more professional binding. And, B size
can always be reproduced full size with "fold outs". (frown) B
size (reduced or otherwise) is currently en vogue -- perhaps a
consequence of my aging eyes? :> ]
Aside from "general power", all signals that span pages *must*
come to the edge of the page. I don't like hunting for signals
in the middle of a page even if there is a grid reference to help
me locate it. It's just easier to conceptualize: "OK, this is
used elsewhere" or "This comes from someplace else" so I
know when something I am interested in involves other sheets.
One signal, one name. One *instance* of that name per sheet!
Signals spanning pages are named at the edge of the page.
For designs of "suitable complexity" (in terms of sheets/signals),
I tag off page references with locations of the other "end(s)"
of the signal. If its a small design -- or, if the schematic is
broken down intuitively -- I assume the "other ends" will be
self explanatory.
"Left to right, top to bottom"
Eschew buses -- except on "block diagrams". Show individual
signals. Avoid unnecessary "bends" in signals. *Most* signals
parallel to page edges (some tools prevent you from doing otherwise).
Symbols oriented horizontally and suggestive of the direction
of signal flow (i.e., a gate in a feedback path can point to the
left). "Rocket ships crash (and burn)" :>
Exploit symmetry and repetition. Step and repeat is your friend.
As with *anything*, color has no significance!
Avoid 4-way streets -- unless their use significantly cleans
up the appearance. "Dots" (big ones!) on all connections
(mandated by the relaxed 4WS rule).
Descriptive symbols (e.g., a diode bridge looks like a diamond)
and informative symbols (e.g., IEEE unless the device *really*
is a "black box" -- I don't consider *memory* to be a black box!)
DeMorgan equivalents as appropriate. (I won't get into the rules
I use for building symbols as they get pretty involved)
Reference designator before device name/value. Either both to
one side (left/right/top/bottom) or one on each side (left/right,
top/bottom).
Unless a connector(s) inherently *merits* location on a separate
sheet (e.g., a PCI connector whose "pins" feed many other sheets),
locate the connector with the signals that tie to it (i.e., no
sheets full of connectors).
Don't tie the schematic to a physical implementation. I.e.,
the symbol for a connector shouldn't physically look like
the connector just as the symbol for a transistor doesn't
look like the transistor itself! If you need to clarify
the appearance or pin layout of a component, do so in
text or other documentation outside of the "schematic" itself.
Decoupling caps specifically required by individual components
located proximal to the component symbols themselves. Other
"general" bypass caps grouped on a single sheet. Power and
ground connections not explicitly shown on components tabulated
on that same sheet, if possible.
Only *terse* notes re: layout/manufacture/test on the actual
drawings; anything more verbose goes on a "notes" sheet.
On analog portions of the design, test voltage annotations
and 'scope traces, where *essential*. Remember, everything you
put on the drawing has to be *maintained*! If you make a change,
are you prepared to capture another 'scope trace? :>
Document history on the cover page *only*. One firm I worked for
used to summarize *all* revisions of a schematic *on* the schematic.
I.e., lots of little "windows" showing portions of the schematic
as they existed previously. I think this is a poor man's way of
*not* using "proper" document retrieval systems (i.e., if I
need Rev C of a design, then I should fetch the Rev C documents!)
I suspect there are many more that I just take for granted and
have failed to mention, here. :< *Somewhere* I have a document
formalizing all of these things. Though I suspect it is in
a format particular to a DTP program that I no longer have
on-line! :-/
Of course, this is *highly* subjective -- but, I'd enjoy hearing
folks' "conventions" used when preparing schematics (that *others*
will consume -- how you scribble for your own purposes isn't
important as it depends a lot on what *you* want out of the
drawing).
I try to follow some general rules -- but also feel free to bend
them as needed. Most have evolved over the years from different
employers, standards, experience, etc.
E.g., I *tend* to prefer landscape orientation -- though I
drew a B size "portrait" this morning in lieu of a C size
landscape.
I try to include a block diagram of any "sizable" design early
in the document. I try to draft the individual pages so that
they roughly correspond with the blocks in that diagram.
I prefer spreading things over one sheet instead of trying to cram
everything onto one sheet -- unless the design is small enough
to do so without making that sheet cluttered. I.e., it is easier
to trace a signal on a single sheet than to have to flip to
another sheet; but, if there is a ratsnest of signals on that
one sheet, then tracing the signal can be perilous.
Smallest page size to realistically support the design subject
to the remainder of these criteria. E.g., sure, you can fit
everything on an E-size drawing, but reproducing that drawing
(either full size or in "published" documentation) and *using*
that drawing become a real PITA!
[I vacillate between preferring B or C size drawings. C is nice
in that it reduces to A nicely (i.e., with the same aspect ratio)
OTOH, B is nice because reducing to A leaves room along the
binding edge -- which must be located "above" the drawing! -- for
three hole punch *or* more professional binding. And, B size
can always be reproduced full size with "fold outs". (frown) B
size (reduced or otherwise) is currently en vogue -- perhaps a
consequence of my aging eyes? :> ]
Aside from "general power", all signals that span pages *must*
come to the edge of the page. I don't like hunting for signals
in the middle of a page even if there is a grid reference to help
me locate it. It's just easier to conceptualize: "OK, this is
used elsewhere" or "This comes from someplace else" so I
know when something I am interested in involves other sheets.
One signal, one name. One *instance* of that name per sheet!
Signals spanning pages are named at the edge of the page.
For designs of "suitable complexity" (in terms of sheets/signals),
I tag off page references with locations of the other "end(s)"
of the signal. If its a small design -- or, if the schematic is
broken down intuitively -- I assume the "other ends" will be
self explanatory.
"Left to right, top to bottom"
Eschew buses -- except on "block diagrams". Show individual
signals. Avoid unnecessary "bends" in signals. *Most* signals
parallel to page edges (some tools prevent you from doing otherwise).
Symbols oriented horizontally and suggestive of the direction
of signal flow (i.e., a gate in a feedback path can point to the
left). "Rocket ships crash (and burn)" :>
Exploit symmetry and repetition. Step and repeat is your friend.
As with *anything*, color has no significance!
Avoid 4-way streets -- unless their use significantly cleans
up the appearance. "Dots" (big ones!) on all connections
(mandated by the relaxed 4WS rule).
Descriptive symbols (e.g., a diode bridge looks like a diamond)
and informative symbols (e.g., IEEE unless the device *really*
is a "black box" -- I don't consider *memory* to be a black box!)
DeMorgan equivalents as appropriate. (I won't get into the rules
I use for building symbols as they get pretty involved)
Reference designator before device name/value. Either both to
one side (left/right/top/bottom) or one on each side (left/right,
top/bottom).
Unless a connector(s) inherently *merits* location on a separate
sheet (e.g., a PCI connector whose "pins" feed many other sheets),
locate the connector with the signals that tie to it (i.e., no
sheets full of connectors).
Don't tie the schematic to a physical implementation. I.e.,
the symbol for a connector shouldn't physically look like
the connector just as the symbol for a transistor doesn't
look like the transistor itself! If you need to clarify
the appearance or pin layout of a component, do so in
text or other documentation outside of the "schematic" itself.
Decoupling caps specifically required by individual components
located proximal to the component symbols themselves. Other
"general" bypass caps grouped on a single sheet. Power and
ground connections not explicitly shown on components tabulated
on that same sheet, if possible.
Only *terse* notes re: layout/manufacture/test on the actual
drawings; anything more verbose goes on a "notes" sheet.
On analog portions of the design, test voltage annotations
and 'scope traces, where *essential*. Remember, everything you
put on the drawing has to be *maintained*! If you make a change,
are you prepared to capture another 'scope trace? :>
Document history on the cover page *only*. One firm I worked for
used to summarize *all* revisions of a schematic *on* the schematic.
I.e., lots of little "windows" showing portions of the schematic
as they existed previously. I think this is a poor man's way of
*not* using "proper" document retrieval systems (i.e., if I
need Rev C of a design, then I should fetch the Rev C documents!)
I suspect there are many more that I just take for granted and
have failed to mention, here. :< *Somewhere* I have a document
formalizing all of these things. Though I suspect it is in
a format particular to a DTP program that I no longer have
on-line! :-/
(With multi-pin connectors, sometimes the hook-ups are a lot cleaner if
