Dumb question regarding SMPS

[Joerg]

[...]

My schematics do describe how it works. Analog guys live that way.

If there is a huge box on the page and nothing else, you are *not* describing
how it works. It's no better than a netlist. Worse, actually, because you
have to trace wires to find out which signals they're tied to.

I see that differently. There is a uC on that page and it shows all the
stuff that goes there. If I want to see the circuitry that makes
MODESYNC or whatever all it takes is to go to that pages. Either that's
written right next to it or one uses the find function.

What it's hooked to is anyone's guess, though.

Nope, easy to find. I never have a problem with that.

A hundred blocks, perhaps. A few, not so much. Separating all the power,
grounds, and JTAG, for instance, cleans up the schematic a *lot*. Breaking out
the memory controller (or two - separate pages) goes a long way to
readability. Perhaps all the A/Ds on a block and timers on another. There are
reasonable ways to divide things up functionally. It's much like the argument
for hierarchy. One big box simply sucks.

A hierarchy makes that super-simple. The uC is one big block and resides
one notch above the analog stuff in the pecking order. So all you have
to do is go up one hierarchy level ato see where everything connects.

Nonsense. BGAs are often worth salvaging so sure there's a business in doing
so. They are more difficult to replace so maybe there's a business there,
too. They are *not* less reliable than QFPs. Just the opposite, in fact.

No. I spoke to a few of those guys, wanting to know how business is
going for them. Booming, they said. And none of them was salvaging any
BGA, they were all repairing boards with failed BGA connections.

Thinkpads created a sizeable part of their revenue stream.

QFPs have never failed? I can tell you otherwise!

Anything with flexible leads in there generally fails less in harsh
environments because there is compliance in the links. This is why I am
using LFPAK FETs on the design I am working on right now. Because they
have real legs on one side and the unit can poptentially be dropped onto
concrete once in a while, as can just about anything.

You said "record qty of five cords", implying that it was less last year.

<nitpick_mode>

I said "record qty of five cords of almond again". Big difference.

Ouch. My heat pumps cost $.07/kWh(GA) and $.09(AL) during the heating season.
My power bill approaches $200 (each place, if they were both running) during
January and July. It's about half that in the off months so the heat portion
of the bill is about $100 (maybe $120).

Make sure not to let too many lefties into state government. Else that
will change rather quickly.

 

[[email protected]]

[email protected] wrote:

[email protected] wrote:
[email protected] wrote:
John Larkin wrote:
John Larkin wrote:
Jim Thompson wrote:
03:12 -0700, John Larkin
I'm on my third laptop right now. Every time I plugged my Dell's "fat
snake" into the wall, I drew quite an arc. The Lenovo's arc was not
noticeable, but now I get a noticeable arc with my new HP -- not as
big as the Dell's, however.
I know FA about switch mode power supplies, obviously, so I wonder
1. What produces the arc?
2. Why would different power supplies produce different arcs (does it
just depend on output power capability)?
3. Why is there no arc when I pull the plug from the outlet?
Dumb switching power supplies have a bridge rectifier and a big
electrolytic filter capacitor. If you plug them in near the peak of
the AC line waveform, the charging current will spark.
Better supplies, with inrush limiters, or PFC (power factor corrected)
front-ends, have much less inrush charge.
Ask Jim for details. He is *so good* at designing switching power
supplies.
Indeed I am >
I like the ucc28019a. works like a champ. Undervoltage lockout too
Cheers
So does the L6561. But poorly documented and no model; and ST ignores
my pounding on their door >
If I could make major changes I'd design ST out _forever_!
Might be the new normal. I want to design in a National video driver,
LMH6722. Has a thermal pad under its belly. In the datasheet they forgot
to mention where its s'posed to be connected to. Probably V- but I'd
rather make sure. Filed a support ticket with the new owner TI on 10/2.
Got a service request number.
Today is 10/8 and (finally! ... or so I thought) there was a message in
the inbox this morning. A form letter, merely saying that, tada, a
service request number has been issued. New number: Same as the old number.
So I responded politely as to when I might be expecting an answer. No
response all day.
Hurumph!
Get one and ohm it out.
No kidding, that may be the only way :-(
Just made a CAD model for a 100-TQFP processor. Now I know why I chose
to become an analog guy and not a digital one.
Do you mean a PCB decal, or an actual Autocad sort of thing?
PADS makes IC decals really fast, for sort of standard things with
rows of numbered pins.
Are you doing 3D Solidworks sort of physical modeling? It is fun to
finally spin that stuff around in space, or take a virtual walk under
the IC pins.
No, just the schematic library part and footprint. A hundred pins, most
of which have names like this:
(OC0A/OC1C/PCINT7)PB7
One typo and all hell can break loose because the routing resources in
those uCs are sparse and can be unforgiving. Just had a major
re-shuffling in one of them on another project, not because of an error
but for a feature change. When those get maxed out in port pins the
design can slow down as much as Van Ness at rush hour, mainly because of
routing compromises.
You *should* be able to either grab the names from a spreadsheet or
cut-n-paste from a datasheet. The vendors often have models already built
that can be used for a starting place, too.
Only for some CAD packages, if at all. My CAD has a lot of the Atmels,
just not this big one.
which one?

... OTOH, our CAD people demand that
chips look on the schematic like they do on the board - no functional
partitioning (except BGAs, for some reason).
I insist on the same, I really hate netlist-style schematics where the
front axle is on page 17 which the left front wheel it on page 32.
Exceptions are logic gate and opamp multi-packs, of course. And I never
use large BGAs, those can spell doom in a hi-rel environment.

isn't reliabily and BGAs something that was perfected many years ago?
Sure, at least in the larger packages. Joerg is living in the '80s. They
even worked well then but many didn't have the process down.

for something like a big FPGA I think it it makes sense to put core
power, jtag
configuration and such on one symbol and each bank on a separate
symbol
Agree 100%. Even "small" 144-pin QFPs are a mess when they're shown as one
big box on a page with wires everywhere. Joerg probably doesn't like busses,
either (someone here objected to them a while back).

Actually I do like buses a lot. Especially the ones with comfy seats and
WiFi on board ... Just kidding, I do like buses on schematics.

Busses where the contents are not similarly named (not Bus[0:11], rather
BusWr, BusRd, BusEn,...)?


If it's clear what the bus does I am ok with that. But I prefer
BUSWR[0:11], BUSRD[0:11], BUSEN[0:3], and so on. Consistency is
important in schematics.

Huh? Do you have twelve bus writes?

I often break FPGAs up by I/O bank, if I haven't got the design very far
along. If know how it's going to flow, I'll break it up that way. I can
still do that with BGAs, but not QFPs or QFNs. The CPoE has some really
strange ideas on how a schematic is to look. The CAD system sucks, too, but
that's a different topic. ;-)

Ever dealt with Asian-style schematics? Oh, there is still some white on
the page, let's cram the preamp in there. Then you start following a
line clear across the page and it goes to ... ground!

I work for an Asian company. I think their schematics *suck*. No hierarchy,
even.


You have my sympathies

Their processed really are terrible (surprised me!). One particularly bad
point is grounds. If a connector has a shield connection, for instance,
that's not shown in the datasheet as a pin, it's not shown on the schematic.
The layout the layout person has to manually connect it to GND (or wherever).
It's up to the next layout guy to remember to do it, too. Worse, if I do
place a ground pin for it in the symbol library and someone else comes along
and uses that part, they'll remove the ground pin. *Poof*, mine is gone too.
No warning, nothing.

We show anything electrically connectable (like connector shell tabs,
or IC power pads) as pins. Our RJ45 may have 12 pins, 8 signals and 4
grounds. We also show mounting holes on the schematic as parts, and
ground them or float them.

That's the way it should be done. If anything is electrically connected it
should be shown in the schematic. Mounting holes that aren't physically
connected to anything I really don't care too much about. There is no other
way to do LVS checking.

In PADS, when you put a part on a board it imports it from the library
and includes it in the current design files. If you go from, say, rev
A to rev B on a schematiccb set, it does NOT refresh from the
library unless you explicitly tell it to. So library changes don't
break an existing, working design.

OrCAD does that, too. It carries all the parts along with the schematic. I
never thought I'd appreciate OrCAD!

We have a few legacy parts with hidden VCC/ground pins (right-click to
see what nets they connect to) but lately we show everything.

That's the right way to do it, IMO.

We never delete a part from our database, but some parts are
"retired." They are physically removed from the stock room, and either
disposed of, or stashed elsewhere in case engineering might want to
play with a few for some reason.

Nope. No way to "retire" them from the schematic database. Everything shows
up the same.

It's shocking how sloppy some people are about stuff like this, about
fully documenting things. But it's not a simple problem to handle
revs, dash numbers, ECOs, BOMs, schematics, assembly drawings,
manuals, test procedures, all that.

It's not sloppy, at all. Sloppy says that someone isn't doing their job. In
this case it's working as designed but severely broken (as designed). There
is nothing we can do about it, either. ...and I haven't even scratched the
surface of the idiocy, here.

 

[[email protected]]

[email protected] wrote:

[email protected] wrote:
[email protected] wrote:
John Larkin wrote:
John Larkin wrote:
Jim Thompson wrote:
03:12 -0700, John Larkin
I'm on my third laptop right now. Every time I plugged my Dell's "fat
snake" into the wall, I drew quite an arc. The Lenovo's arc was not
noticeable, but now I get a noticeable arc with my new HP -- not as
big as the Dell's, however.
I know FA about switch mode power supplies, obviously, so I wonder
1. What produces the arc?
2. Why would different power supplies produce different arcs (does it
just depend on output power capability)?
3. Why is there no arc when I pull the plug from the outlet?
Dumb switching power supplies have a bridge rectifier and a big
electrolytic filter capacitor. If you plug them in near the peak of
the AC line waveform, the charging current will spark.
Better supplies, with inrush limiters, or PFC (power factor corrected)
front-ends, have much less inrush charge.
Ask Jim for details. He is *so good* at designing switching power
supplies.
Indeed I am >
I like the ucc28019a. works like a champ. Undervoltage lockout too
Cheers
So does the L6561. But poorly documented and no model; and ST ignores
my pounding on their door >
If I could make major changes I'd design ST out _forever_!
Might be the new normal. I want to design in a National video driver,
LMH6722. Has a thermal pad under its belly. In the datasheet they forgot
to mention where its s'posed to be connected to. Probably V- but I'd
rather make sure. Filed a support ticket with the new owner TI on 10/2.
Got a service request number.
Today is 10/8 and (finally! ... or so I thought) there was a message in
the inbox this morning. A form letter, merely saying that, tada, a
service request number has been issued. New number: Same as the old number.
So I responded politely as to when I might be expecting an answer. No
response all day.
Hurumph!
Get one and ohm it out.
No kidding, that may be the only way :-(
Just made a CAD model for a 100-TQFP processor. Now I know why I chose
to become an analog guy and not a digital one.
Do you mean a PCB decal, or an actual Autocad sort of thing?
PADS makes IC decals really fast, for sort of standard things with
rows of numbered pins.
Are you doing 3D Solidworks sort of physical modeling? It is fun to
finally spin that stuff around in space, or take a virtual walk under
the IC pins.
No, just the schematic library part and footprint. A hundred pins, most
of which have names like this:
(OC0A/OC1C/PCINT7)PB7
One typo and all hell can break loose because the routing resources in
those uCs are sparse and can be unforgiving. Just had a major
re-shuffling in one of them on another project, not because of an error
but for a feature change. When those get maxed out in port pins the
design can slow down as much as Van Ness at rush hour, mainly because of
routing compromises.
You *should* be able to either grab the names from a spreadsheet or
cut-n-paste from a datasheet. The vendors often have models already built
that can be used for a starting place, too.
Only for some CAD packages, if at all. My CAD has a lot of the Atmels,
just not this big one.
which one?

... OTOH, our CAD people demand that
chips look on the schematic like they do on the board - no functional
partitioning (except BGAs, for some reason).
I insist on the same, I really hate netlist-style schematics where the
front axle is on page 17 which the left front wheel it on page 32.
Exceptions are logic gate and opamp multi-packs, of course. And I never
use large BGAs, those can spell doom in a hi-rel environment.

isn't reliabily and BGAs something that was perfected many years ago?
Sure, at least in the larger packages. Joerg is living in the '80s. They
even worked well then but many didn't have the process down.

for something like a big FPGA I think it it makes sense to put core
power, jtag
configuration and such on one symbol and each bank on a separate
symbol
Agree 100%. Even "small" 144-pin QFPs are a mess when they're shown as one
big box on a page with wires everywhere. Joerg probably doesn't like busses,
either (someone here objected to them a while back).

Actually I do like buses a lot. Especially the ones with comfy seats and
WiFi on board ... Just kidding, I do like buses on schematics.
Busses where the contents are not similarly named (not Bus[0:11], rather
BusWr, BusRd, BusEn,...)?

If it's clear what the bus does I am ok with that. But I prefer
BUSWR[0:11], BUSRD[0:11], BUSEN[0:3], and so on. Consistency is
important in schematics.

Huh? Do you have twelve bus writes?

That usually means how many lines a bus has. Yes, some of mine have 12
lines.

Not how many, but their number ranges. BUSWR[0:11] would contain 12 lines
named BUSWR0, BUSWR1, ...,BUSWR11. A rather unusual thing? Do you support
busses within busses? Iv'e never seen that, either.

Yikes! That can quickly result in egg in the face, at the EMC lab.

Or worse. It could show up six months later, after the customer has already
sold a million.

If you look long enough you probably still find rectifier tubes,
nuvistors and Leyden jars in there.
;-)


I bet it does. Now I am glad to be self-employed

Wait until Obama is done with you.

 

[[email protected]]

[email protected] wrote:

[email protected] wrote:

[email protected] wrote:

[email protected] wrote:

[...]

... OTOH, our CAD people demand that
chips look on the schematic like they do on the board - no functional
partitioning (except BGAs, for some reason).
I insist on the same, I really hate netlist-style schematics where the
front axle is on page 17 which the left front wheel it on page 32.
Of course not. All the wheels go on page-1 (with the tires/wheels/and nuts in
the hierarchy on page 2-5) and the Engine goes on page 12, with the exhaust on
page 88.

Exceptions are logic gate and opamp multi-packs, of course.
Gates and opamps are drawn symbolically but everything else is a single
physical square box. UGH! It makes *really* ugly schematics. Impossible to
follow.

That's in fact how most people want schematics. Including myself.
Most? GOt a cite for that? None of the companies I've worked for wanted
anything that ugly. It makes the schematic unreadable.

Most as in pretty much all my clients. I don't think there is any
opinion poll data for that available.
Sorta my point, though if I'd shown up with a schematic like that, no one
would have hired me. They want their documentation to describe how the widget
works.

My schematics do describe how it works. Analog guys live that way.

If there is a huge box on the page and nothing else, you are *not* describing
how it works. It's no better than a netlist. Worse, actually, because you
have to trace wires to find out which signals they're tied to.

I see that differently. There is a uC on that page and it shows all the
stuff that goes there. If I want to see the circuitry that makes
MODESYNC or whatever all it takes is to go to that pages. Either that's
written right next to it or one uses the find function.

OTOH, if you want to know what resources in the micro are being used to drive
MODESYNC, you're screwed.

Nope, easy to find. I never have a problem with that.

How do you know what resource in the uC it's using? You have to trace it back
to the pin, through an ungodly rats nest.

A hierarchy makes that super-simple. The uC is one big block and resides
one notch above the analog stuff in the pecking order. So all you have
to do is go up one hierarchy level ato see where everything connects.

I meant, taking the hierarchy meme to the chip level. The uC functions are
part of the hierarchy.

No. I spoke to a few of those guys, wanting to know how business is
going for them. Booming, they said. And none of them was salvaging any
BGA, they were all repairing boards with failed BGA connections.

You must have some piss poor fab houses out there on the left coast. We've had
a couple failed BGAs (fumble fingers) but that's it. I have *far* more
problems with QFPs but they are easier to repair.

Thinkpads created a sizeable part of their revenue stream.

I've had six ThinkPads. Problems, but no BGAs. This one was a fan. The
replacement, an organ replacement from my wife's old T60, didn't go so well
(heat issues and I buggered up the keyboard connector).

Anything with flexible leads in there generally fails less in harsh
environments because there is compliance in the links. This is why I am
using LFPAK FETs on the design I am working on right now. Because they
have real legs on one side and the unit can poptentially be dropped onto
concrete once in a while, as can just about anything.

Your theory sounds plausible but it's not reality.

<nitpick_mode>

I said "record qty of five cords of almond again". Big difference.

</nitpick_mode>

OK? So five cords is a record and it's not? I can't decode it.

Make sure not to let too many lefties into state government. Else that
will change rather quickly.

No Democrats allowed. ;-) They (even Republicans can be tax and spenders)
wanted to raise sales tax a penny to pay for "roads". Of course under the
covers, 80% was going to mass transit and almost all of the other projects in
the list had already been committed. The referendum went down 3:1. Even in
the big city it went down 2:1.

 

[Joerg]

[email protected] wrote:

[email protected] wrote:
[email protected] wrote:
John Larkin wrote:
John Larkin wrote:
Jim Thompson wrote:
03:12 -0700, John Larkin
I'm on my third laptop right now. Every time I plugged my Dell's "fat
snake" into the wall, I drew quite an arc. The Lenovo's arc was not
noticeable, but now I get a noticeable arc with my new HP -- not as
big as the Dell's, however.
I know FA about switch mode power supplies, obviously, so I wonder
1. What produces the arc?
2. Why would different power supplies produce different arcs (does it
just depend on output power capability)?
3. Why is there no arc when I pull the plug from the outlet?
Dumb switching power supplies have a bridge rectifier and a big
electrolytic filter capacitor. If you plug them in near the peak of
the AC line waveform, the charging current will spark.
Better supplies, with inrush limiters, or PFC (power factor corrected)
front-ends, have much less inrush charge.
Ask Jim for details. He is *so good* at designing switching power
supplies.
Indeed I am >
I like the ucc28019a. works like a champ. Undervoltage lockout too
Cheers
So does the L6561. But poorly documented and no model; and ST ignores
my pounding on their door >
If I could make major changes I'd design ST out _forever_!
Might be the new normal. I want to design in a National video driver,
LMH6722. Has a thermal pad under its belly. In the datasheet they forgot
to mention where its s'posed to be connected to. Probably V- but I'd
rather make sure. Filed a support ticket with the new owner TI on 10/2.
Got a service request number.
Today is 10/8 and (finally! ... or so I thought) there was a message in
the inbox this morning. A form letter, merely saying that, tada, a
service request number has been issued. New number: Same as the old number.
So I responded politely as to when I might be expecting an answer. No
response all day.
Hurumph!
Get one and ohm it out.
No kidding, that may be the only way :-(
Just made a CAD model for a 100-TQFP processor. Now I know why I chose
to become an analog guy and not a digital one.
Do you mean a PCB decal, or an actual Autocad sort of thing?
PADS makes IC decals really fast, for sort of standard things with
rows of numbered pins.
Are you doing 3D Solidworks sort of physical modeling? It is fun to
finally spin that stuff around in space, or take a virtual walk under
the IC pins.
No, just the schematic library part and footprint. A hundred pins, most
of which have names like this:
(OC0A/OC1C/PCINT7)PB7
One typo and all hell can break loose because the routing resources in
those uCs are sparse and can be unforgiving. Just had a major
re-shuffling in one of them on another project, not because of an error
but for a feature change. When those get maxed out in port pins the
design can slow down as much as Van Ness at rush hour, mainly because of
routing compromises.
You *should* be able to either grab the names from a spreadsheet or
cut-n-paste from a datasheet. The vendors often have models already built
that can be used for a starting place, too.
Only for some CAD packages, if at all. My CAD has a lot of the Atmels,
just not this big one.
which one?

... OTOH, our CAD people demand that
chips look on the schematic like they do on the board - no functional
partitioning (except BGAs, for some reason).
I insist on the same, I really hate netlist-style schematics where the
front axle is on page 17 which the left front wheel it on page 32.
Exceptions are logic gate and opamp multi-packs, of course. And I never
use large BGAs, those can spell doom in a hi-rel environment.

isn't reliabily and BGAs something that was perfected many years ago?
Sure, at least in the larger packages. Joerg is living in the '80s. They
even worked well then but many didn't have the process down.

for something like a big FPGA I think it it makes sense to put core
power, jtag
configuration and such on one symbol and each bank on a separate
symbol
Agree 100%. Even "small" 144-pin QFPs are a mess when they're shown as one
big box on a page with wires everywhere. Joerg probably doesn't like busses,
either (someone here objected to them a while back).

Actually I do like buses a lot. Especially the ones with comfy seats and
WiFi on board ... Just kidding, I do like buses on schematics.
Busses where the contents are not similarly named (not Bus[0:11], rather
BusWr, BusRd, BusEn,...)?
If it's clear what the bus does I am ok with that. But I prefer
BUSWR[0:11], BUSRD[0:11], BUSEN[0:3], and so on. Consistency is
important in schematics.
Huh? Do you have twelve bus writes?

That usually means how many lines a bus has. Yes, some of mine have 12
lines.

Not how many, but their number ranges. BUSWR[0:11] would contain 12 lines
named BUSWR0, BUSWR1, ...,BUSWR11. A rather unusual thing? Do you support
busses within busses? Iv'e never seen that, either.

That's probably because you've never designed an ultrasound beamformer

Very normal thing there. For example, the bus CKL[0:31] contains 16
differential bus lines that go to 16 different locations, FIFOCLK[0:15]
contains 16 single-ended FIFO clocks.

Or worse. It could show up six months later, after the customer has already
sold a million.

.... and one of their end users has plug it in somewhere and a building
caught fire ...

Wait until Obama is done with you.

He may not have another chance anymore. At least the recent polls do not
look good for him.

Also, if it gets to be really bad folks like us can easily pick up
stakes and move to some tropical place. Where there is no winter.
Nowadays with Internet and Fedex it doesn't matter much where a
consultant's office is located.

 

[Joerg]

[email protected] wrote:

[email protected] wrote:

[email protected] wrote:

[email protected] wrote: [...]

... OTOH, our CAD people demand that
chips look on the schematic like they do on the board - no functional
partitioning (except BGAs, for some reason).
I insist on the same, I really hate netlist-style schematics where the
front axle is on page 17 which the left front wheel it on page 32.
Of course not. All the wheels go on page-1 (with the tires/wheels/and nuts in
the hierarchy on page 2-5) and the Engine goes on page 12, with the exhaust on
page 88.

Exceptions are logic gate and opamp multi-packs, of course.
Gates and opamps are drawn symbolically but everything else is a single
physical square box. UGH! It makes *really* ugly schematics. Impossible to
follow.

That's in fact how most people want schematics. Including myself.
Most? GOt a cite for that? None of the companies I've worked for wanted
anything that ugly. It makes the schematic unreadable.

Most as in pretty much all my clients. I don't think there is any
opinion poll data for that available.
Sorta my point, though if I'd shown up with a schematic like that, no one
would have hired me. They want their documentation to describe how the widget
works.

My schematics do describe how it works. Analog guys live that way.
If there is a huge box on the page and nothing else, you are *not* describing
how it works. It's no better than a netlist. Worse, actually, because you
have to trace wires to find out which signals they're tied to.

I see that differently. There is a uC on that page and it shows all the
stuff that goes there. If I want to see the circuitry that makes
MODESYNC or whatever all it takes is to go to that pages. Either that's
written right next to it or one uses the find function.

OTOH, if you want to know what resources in the micro are being used to drive
MODESYNC, you're screwed.

I don't need to know that from a schematic. At the beginning of a
project I stake my claims to timers, PWMs, interrupt-capable pins, ADC
channels and whatnot. That gets listed and goes right into my module
spec before a single brush stroke happens in the schematic. I strongly
believe in top-down design.

How do you know what resource in the uC it's using? You have to trace it back
to the pin, through an ungodly rats nest.

I just look it up in the module spec. One reason why I use a 27"
monitor. Sometimes I keep it open on the netbook to my left.

I meant, taking the hierarchy meme to the chip level. The uC functions are
part of the hierarchy.

I'd never, ever do that except maybe for a big fat FPGA. That can go
into a hiearchy at different levels but not a uC.

You must have some piss poor fab houses out there on the left coast. We've had
a couple failed BGAs (fumble fingers) but that's it. I have *far* more
problems with QFPs but they are easier to repair.

I don't think many of the computing devices they do BGA fixes and
re-balling on where built here.

I've had six ThinkPads. Problems, but no BGAs. This one was a fan. The
replacement, an organ replacement from my wife's old T60, didn't go so well
(heat issues and I buggered up the keyboard connector).

You were either lucky or very careful with them.

Your theory sounds plausible but it's not reality.

It is reality. It's been tested but I can't copy those docs because then
I'd get shot. The failures usually happen under two test conditions,
vibration and rapid temp-cycling.

OK? So five cords is a record and it's not? I can't decode it.

Record qty seen over several years. We've needed five cords the last
three years. Before it was 3.5 to 4, before that 3, before that 2.
Global warming at its finest.

No Democrats allowed. ;-) They (even Republicans can be tax and spenders)
wanted to raise sales tax a penny to pay for "roads". Of course under the
covers, 80% was going to mass transit and almost all of the other projects in
the list had already been committed. The referendum went down 3:1. Even in
the big city it went down 2:1.

Good! Wish it was the same here but people are repeatedly cajoled into
voting "for the children" or whetever, and then they are being fleeced.

 

[[email protected]]

On Wed, 10 Oct 2012 13:46:33 -0400, "[email protected]"


[email protected] wrote:

[email protected] wrote:
[email protected] wrote:
John Larkin wrote:
John Larkin wrote:
Jim Thompson wrote:
03:12 -0700, John Larkin
I'm on my third laptop right now. Every time I plugged my Dell's "fat
snake" into the wall, I drew quite an arc. The Lenovo's arc was not
noticeable, but now I get a noticeable arc with my new HP -- not as
big as the Dell's, however.
I know FA about switch mode power supplies, obviously, so I wonder
1. What produces the arc?
2. Why would different power supplies produce different arcs (does it
just depend on output power capability)?
3. Why is there no arc when I pull the plug from the outlet?
Dumb switching power supplies have a bridge rectifier and a big
electrolytic filter capacitor. If you plug them in near the peak of
the AC line waveform, the charging current will spark.
Better supplies, with inrush limiters, or PFC (power factor corrected)
front-ends, have much less inrush charge.
Ask Jim for details. He is *so good* at designing switching power
supplies.
Indeed I am >
I like the ucc28019a. works like a champ. Undervoltage lockout too
Cheers
So does the L6561. But poorly documented and no model; and ST ignores
my pounding on their door >
If I could make major changes I'd design ST out _forever_!
Might be the new normal. I want to design in a National video driver,
LMH6722. Has a thermal pad under its belly. In the datasheet they forgot
to mention where its s'posed to be connected to. Probably V- but I'd
rather make sure. Filed a support ticket with the new owner TI on 10/2.
Got a service request number.
Today is 10/8 and (finally! ... or so I thought) there was a message in
the inbox this morning. A form letter, merely saying that, tada, a
service request number has been issued. New number: Same as the old number.
So I responded politely as to when I might be expecting an answer. No
response all day.
Hurumph!
Get one and ohm it out.
No kidding, that may be the only way :-(
Just made a CAD model for a 100-TQFP processor. Now I know why I chose
to become an analog guy and not a digital one.
Do you mean a PCB decal, or an actual Autocad sort of thing?
PADS makes IC decals really fast, for sort of standard things with
rows of numbered pins.
Are you doing 3D Solidworks sort of physical modeling? It is fun to
finally spin that stuff around in space, or take a virtual walk under
the IC pins.
No, just the schematic library part and footprint. A hundred pins, most
of which have names like this:
(OC0A/OC1C/PCINT7)PB7
One typo and all hell can break loose because the routing resources in
those uCs are sparse and can be unforgiving. Just had a major
re-shuffling in one of them on another project, not because of an error
but for a feature change. When those get maxed out in port pins the
design can slow down as much as Van Ness at rush hour, mainly because of
routing compromises.
You *should* be able to either grab the names from a spreadsheet or
cut-n-paste from a datasheet. The vendors often have models already built
that can be used for a starting place, too.
Only for some CAD packages, if at all. My CAD has a lot of the Atmels,
just not this big one.
which one?

... OTOH, our CAD people demand that
chips look on the schematic like they do on the board - no functional
partitioning (except BGAs, for some reason).
I insist on the same, I really hate netlist-style schematics where the
front axle is on page 17 which the left front wheel it on page 32.
Exceptions are logic gate and opamp multi-packs, of course. And I never
use large BGAs, those can spell doom in a hi-rel environment.

isn't reliabily and BGAs something that was perfected many years ago?
Sure, at least in the larger packages. Joerg is living in the '80s. They
even worked well then but many didn't have the process down.

for something like a big FPGA I think it it makes sense to put core
power, jtag
configuration and such on one symbol and each bank on a separate
symbol
Agree 100%. Even "small" 144-pin QFPs are a mess when they're shown as one
big box on a page with wires everywhere. Joerg probably doesn't like busses,
either (someone here objected to them a while back).

Actually I do like buses a lot. Especially the ones with comfy seats and
WiFi on board ... Just kidding, I do like buses on schematics.

Busses where the contents are not similarly named (not Bus[0:11], rather
BusWr, BusRd, BusEn,...)?


If it's clear what the bus does I am ok with that. But I prefer
BUSWR[0:11], BUSRD[0:11], BUSEN[0:3], and so on. Consistency is
important in schematics.

Huh? Do you have twelve bus writes?

I often break FPGAs up by I/O bank, if I haven't got the design very far
along. If know how it's going to flow, I'll break it up that way. I can
still do that with BGAs, but not QFPs or QFNs. The CPoE has some really
strange ideas on how a schematic is to look. The CAD system sucks, too, but
that's a different topic. ;-)

Ever dealt with Asian-style schematics? Oh, there is still some white on
the page, let's cram the preamp in there. Then you start following a
line clear across the page and it goes to ... ground!

I work for an Asian company. I think their schematics *suck*. No hierarchy,
even.


You have my sympathies

Their processed really are terrible (surprised me!). One particularly bad
point is grounds. If a connector has a shield connection, for instance,
that's not shown in the datasheet as a pin, it's not shown on the schematic.
The layout the layout person has to manually connect it to GND (or wherever).
It's up to the next layout guy to remember to do it, too. Worse, if I do
place a ground pin for it in the symbol library and someone else comes along
and uses that part, they'll remove the ground pin. *Poof*, mine is gone too.
No warning, nothing.

We show anything electrically connectable (like connector shell tabs,
or IC power pads) as pins. Our RJ45 may have 12 pins, 8 signals and 4
grounds. We also show mounting holes on the schematic as parts, and
ground them or float them.

That's the way it should be done. If anything is electrically connected it
should be shown in the schematic. Mounting holes that aren't physically
connected to anything I really don't care too much about. There is no other
way to do LVS checking.

In PADS, when you put a part on a board it imports it from the library
and includes it in the current design files. If you go from, say, rev
A to rev B on a schematiccb set, it does NOT refresh from the
library unless you explicitly tell it to. So library changes don't
break an existing, working design.

OrCAD does that, too. It carries all the parts along with the schematic. I
never thought I'd appreciate OrCAD!

We have a few legacy parts with hidden VCC/ground pins (right-click to
see what nets they connect to) but lately we show everything.

That's the right way to do it, IMO.

Oh, and there is no way to obsolete a component from the database. We have
thousands of capacitors to go through that the manufacturer no longer makes.
These have to be scrubbed every time we put a BOM together.

We never delete a part from our database, but some parts are
"retired." They are physically removed from the stock room, and either
disposed of, or stashed elsewhere in case engineering might want to
play with a few for some reason.

Nope. No way to "retire" them from the schematic database. Everything shows
up the same.

Oh, we can delete parts from the PADS library, and sometimes do. We
could, but don't, delete parts from our inventory database, which is a
different thing.

Certainly it's a different thing. I'll bet it's marked so your purchasing
can't buy it, too. These components aren't marked in any way. They're
perfectly good parts, as far as the capture program is concerned.

Like I said, this is just a small part of the broken system. It's amazing
that anyone is worried about the Asians.

 

[[email protected]]

[email protected] wrote:

[email protected] wrote:

[email protected] wrote:
[email protected] wrote:
John Larkin wrote:
John Larkin wrote:
Jim Thompson wrote:
03:12 -0700, John Larkin
I'm on my third laptop right now. Every time I plugged my Dell's "fat
snake" into the wall, I drew quite an arc. The Lenovo's arc was not
noticeable, but now I get a noticeable arc with my new HP -- not as
big as the Dell's, however.
I know FA about switch mode power supplies, obviously, so I wonder
1. What produces the arc?
2. Why would different power supplies produce different arcs (does it
just depend on output power capability)?
3. Why is there no arc when I pull the plug from the outlet?
Dumb switching power supplies have a bridge rectifier and a big
electrolytic filter capacitor. If you plug them in near the peak of
the AC line waveform, the charging current will spark.
Better supplies, with inrush limiters, or PFC (power factor corrected)
front-ends, have much less inrush charge.
Ask Jim for details. He is *so good* at designing switching power
supplies.
Indeed I am >
I like the ucc28019a. works like a champ. Undervoltage lockout too
Cheers
So does the L6561. But poorly documented and no model; and ST ignores
my pounding on their door >
If I could make major changes I'd design ST out _forever_!
Might be the new normal. I want to design in a National video driver,
LMH6722. Has a thermal pad under its belly. In the datasheet they forgot
to mention where its s'posed to be connected to. Probably V- but I'd
rather make sure. Filed a support ticket with the new owner TI on 10/2.
Got a service request number.
Today is 10/8 and (finally! ... or so I thought) there was a message in
the inbox this morning. A form letter, merely saying that, tada, a
service request number has been issued. New number: Same as the old number.
So I responded politely as to when I might be expecting an answer. No
response all day.
Hurumph!
Get one and ohm it out.
No kidding, that may be the only way :-(
Just made a CAD model for a 100-TQFP processor. Now I know why I chose
to become an analog guy and not a digital one.
Do you mean a PCB decal, or an actual Autocad sort of thing?
PADS makes IC decals really fast, for sort of standard things with
rows of numbered pins.
Are you doing 3D Solidworks sort of physical modeling? It is fun to
finally spin that stuff around in space, or take a virtual walk under
the IC pins.
No, just the schematic library part and footprint. A hundred pins, most
of which have names like this:
(OC0A/OC1C/PCINT7)PB7
One typo and all hell can break loose because the routing resources in
those uCs are sparse and can be unforgiving. Just had a major
re-shuffling in one of them on another project, not because of an error
but for a feature change. When those get maxed out in port pins the
design can slow down as much as Van Ness at rush hour, mainly because of
routing compromises.
You *should* be able to either grab the names from a spreadsheet or
cut-n-paste from a datasheet. The vendors often have models already built
that can be used for a starting place, too.
Only for some CAD packages, if at all. My CAD has a lot of the Atmels,
just not this big one.
which one?

... OTOH, our CAD people demand that
chips look on the schematic like they do on the board - no functional
partitioning (except BGAs, for some reason).
I insist on the same, I really hate netlist-style schematics where the
front axle is on page 17 which the left front wheel it on page 32.
Exceptions are logic gate and opamp multi-packs, of course. And I never
use large BGAs, those can spell doom in a hi-rel environment.

isn't reliabily and BGAs something that was perfected many years ago?
Sure, at least in the larger packages. Joerg is living in the '80s. They
even worked well then but many didn't have the process down.

for something like a big FPGA I think it it makes sense to put core
power, jtag
configuration and such on one symbol and each bank on a separate
symbol
Agree 100%. Even "small" 144-pin QFPs are a mess when they're shown as one
big box on a page with wires everywhere. Joerg probably doesn't like busses,
either (someone here objected to them a while back).

Actually I do like buses a lot. Especially the ones with comfy seats and
WiFi on board ... Just kidding, I do like buses on schematics.
Busses where the contents are not similarly named (not Bus[0:11], rather
BusWr, BusRd, BusEn,...)?
If it's clear what the bus does I am ok with that. But I prefer
BUSWR[0:11], BUSRD[0:11], BUSEN[0:3], and so on. Consistency is
important in schematics.
Huh? Do you have twelve bus writes?

That usually means how many lines a bus has. Yes, some of mine have 12
lines.

Not how many, but their number ranges. BUSWR[0:11] would contain 12 lines
named BUSWR0, BUSWR1, ...,BUSWR11. A rather unusual thing? Do you support
busses within busses? Iv'e never seen that, either.

That's probably because you've never designed an ultrasound beamformer

Very normal thing there. For example, the bus CKL[0:31] contains 16
differential bus lines that go to 16 different locations, FIFOCLK[0:15]
contains 16 single-ended FIFO clocks.

TOTALLY different thing. In our case, thought, we'd name them FIFOCLK0+,
FIFOCLK0-, FIFOCLK1+, FIFOCLK1-.... Actually, I use a format like,
Source_Function_Type[N=Negative]. But you didn't answer my question.

... and one of their end users has plug it in somewhere and a building
caught fire ...

Yep. Guess who's fault it is, too.

He may not have another chance anymore. At least the recent polls do not
look good for him.

Never underestimate the ignorati.

Also, if it gets to be really bad folks like us can easily pick up
stakes and move to some tropical place. Where there is no winter.
Nowadays with Internet and Fedex it doesn't matter much where a
consultant's office is located.

He'll tax you into oblivion before you can leave and lay claim to everything
you ever make. It's the leftist's way.

 

[[email protected]]

[email protected] wrote:

[email protected] wrote:

[email protected] wrote:

[email protected] wrote:

[email protected] wrote:
[...]

... OTOH, our CAD people demand that
chips look on the schematic like they do on the board - no functional
partitioning (except BGAs, for some reason).
I insist on the same, I really hate netlist-style schematics where the
front axle is on page 17 which the left front wheel it on page 32.
Of course not. All the wheels go on page-1 (with the tires/wheels/and nuts in
the hierarchy on page 2-5) and the Engine goes on page 12, with the exhaust on
page 88.

Exceptions are logic gate and opamp multi-packs, of course.
Gates and opamps are drawn symbolically but everything else is a single
physical square box. UGH! It makes *really* ugly schematics. Impossible to
follow.

That's in fact how most people want schematics. Including myself.
Most? GOt a cite for that? None of the companies I've worked for wanted
anything that ugly. It makes the schematic unreadable.

Most as in pretty much all my clients. I don't think there is any
opinion poll data for that available.
Sorta my point, though if I'd shown up with a schematic like that, no one
would have hired me. They want their documentation to describe how the widget
works.

My schematics do describe how it works. Analog guys live that way.
If there is a huge box on the page and nothing else, you are *not* describing
how it works. It's no better than a netlist. Worse, actually, because you
have to trace wires to find out which signals they're tied to.

I see that differently. There is a uC on that page and it shows all the
stuff that goes there. If I want to see the circuitry that makes
MODESYNC or whatever all it takes is to go to that pages. Either that's
written right next to it or one uses the find function.

OTOH, if you want to know what resources in the micro are being used to drive
MODESYNC, you're screwed.

I don't need to know that from a schematic. At the beginning of a
project I stake my claims to timers, PWMs, interrupt-capable pins, ADC
channels and whatnot. That gets listed and goes right into my module
spec before a single brush stroke happens in the schematic. I strongly
believe in top-down design.

You do, but what about the next guy? If you're conveying all information
outside the schematic, then there's no need for a schematic. Just use a
netlist.

I just look it up in the module spec. One reason why I use a 27"
monitor. Sometimes I keep it open on the netbook to my left.

A rats nest is still a rats nest. A 27" monitor just makes it a bigger rats
nest.

I'd never, ever do that except maybe for a big fat FPGA. That can go
into a hiearchy at different levels but not a uC.

You're missing my point completely. A schematic should be broken up and
organized into useful parts. Hierarchy is just one tool. Another is to break
large chunks into smaller bites to help readability. Many uCs and DSPs are
big-fat devices. One almost fits on a D-sized print (and I print on ledger).

I don't think many of the computing devices they do BGA fixes and
re-balling on where built here.

Whoever's doing it should be fired. It's easy stuff.

You were either lucky or very careful with them.

I don't consider six in ten years either. Other things broke, though. Mostly
the displays. As I said, this one was the fan. BGAs certainly aren't the
weak link in a laptop.

It is reality. It's been tested but I can't copy those docs because then
I'd get shot. The failures usually happen under two test conditions,
vibration and rapid temp-cycling.

No, it certainly isn't. BGAs are *very* reliable. The military wouldn't be
using them otherwise. They don't do RoHS and that's a RPITA, but they have
*no* problems with BGAs. Automotive, another harsh long-life environment,
ditto.

Record qty seen over several years. We've needed five cords the last
three years. Before it was 3.5 to 4, before that 3, before that 2.
Global warming at its finest.
Whatever...


Good! Wish it was the same here but people are repeatedly cajoled into
voting "for the children" or whetever, and then they are being fleeced.

At least the tax-and-spenders were embarrassed into putting it up for a
referendum.

 

[Joerg]

[email protected] wrote:

[email protected] wrote:

[email protected] wrote:

[email protected] wrote:

[email protected] wrote:
[...]

... OTOH, our CAD people demand that
chips look on the schematic like they do on the board - no functional
partitioning (except BGAs, for some reason).
I insist on the same, I really hate netlist-style schematics where the
front axle is on page 17 which the left front wheel it on page 32.
Of course not. All the wheels go on page-1 (with the tires/wheels/and nuts in
the hierarchy on page 2-5) and the Engine goes on page 12, with the exhaust on
page 88.

Exceptions are logic gate and opamp multi-packs, of course.
Gates and opamps are drawn symbolically but everything else is a single
physical square box. UGH! It makes *really* ugly schematics. Impossible to
follow.

That's in fact how most people want schematics. Including myself.
Most? GOt a cite for that? None of the companies I've worked for wanted
anything that ugly. It makes the schematic unreadable.

Most as in pretty much all my clients. I don't think there is any
opinion poll data for that available.
Sorta my point, though if I'd shown up with a schematic like that, no one
would have hired me. They want their documentation to describe how the widget
works.

My schematics do describe how it works. Analog guys live that way.
If there is a huge box on the page and nothing else, you are *not* describing
how it works. It's no better than a netlist. Worse, actually, because you
have to trace wires to find out which signals they're tied to.

I see that differently. There is a uC on that page and it shows all the
stuff that goes there. If I want to see the circuitry that makes
MODESYNC or whatever all it takes is to go to that pages. Either that's
written right next to it or one uses the find function.
OTOH, if you want to know what resources in the micro are being used to drive
MODESYNC, you're screwed.

I don't need to know that from a schematic. At the beginning of a
project I stake my claims to timers, PWMs, interrupt-capable pins, ADC
channels and whatnot. That gets listed and goes right into my module
spec before a single brush stroke happens in the schematic. I strongly
believe in top-down design.

You do, but what about the next guy? If you're conveying all information
outside the schematic, then there's no need for a schematic. Just use a
netlist.

Strange, they all understood this kind of stuff even when they didn't
have the module spec at hand. Since about 25 year. It's also how my
clients always used to do it, and that's a lot of companies by now.

A rats nest is still a rats nest. A 27" monitor just makes it a bigger rats
nest.

Again, there is a schematic and a module spec. No ratsnest.

You're missing my point completely. A schematic should be broken up and
organized into useful parts. Hierarchy is just one tool. Another is to break
large chunks into smaller bites to help readability. Many uCs and DSPs are
big-fat devices. One almost fits on a D-sized print (and I print on ledger).

Maybe you guys should use eyeglasses

The 100PQFP I am using right now doesn't even fill 1/10th of a regular
letter A here. So how many pins do yours have? 3000?

Whoever's doing it should be fired. It's easy stuff.

Fact is, lots of field failures and quite a few smart people turned this
into new business opportunities.

[...]

No, it certainly isn't. BGAs are *very* reliable. The military wouldn't be
using them otherwise. They don't do RoHS and that's a RPITA, but they have
*no* problems with BGAs. Automotive, another harsh long-life environment,
ditto.

Don't get me started on automotive electronics ...

[...]

At least the tax-and-spenders were embarrassed into putting it up for a
referendum.

Now the dems have resorted to calling taxes "fees", in order to get
around the 2/3 majority requirement.

 

[Joerg]

[email protected] wrote:

[email protected] wrote:

[email protected] wrote:
[email protected] wrote:
John Larkin wrote:
John Larkin wrote:
Jim Thompson wrote:
03:12 -0700, John Larkin
I'm on my third laptop right now. Every time I plugged my Dell's "fat
snake" into the wall, I drew quite an arc. The Lenovo's arc was not
noticeable, but now I get a noticeable arc with my new HP -- not as
big as the Dell's, however.
I know FA about switch mode power supplies, obviously, so I wonder
1. What produces the arc?
2. Why would different power supplies produce different arcs (does it
just depend on output power capability)?
3. Why is there no arc when I pull the plug from the outlet?
Dumb switching power supplies have a bridge rectifier and a big
electrolytic filter capacitor. If you plug them in near the peak of
the AC line waveform, the charging current will spark.
Better supplies, with inrush limiters, or PFC (power factor corrected)
front-ends, have much less inrush charge.
Ask Jim for details. He is *so good* at designing switching power
supplies.
Indeed I am >
I like the ucc28019a. works like a champ. Undervoltage lockout too
Cheers
So does the L6561. But poorly documented and no model; and ST ignores
my pounding on their door >
If I could make major changes I'd design ST out _forever_!
Might be the new normal. I want to design in a National video driver,
LMH6722. Has a thermal pad under its belly. In the datasheet they forgot
to mention where its s'posed to be connected to. Probably V- but I'd
rather make sure. Filed a support ticket with the new owner TI on 10/2.
Got a service request number.
Today is 10/8 and (finally! ... or so I thought) there was a message in
the inbox this morning. A form letter, merely saying that, tada, a
service request number has been issued. New number: Same as the old number.
So I responded politely as to when I might be expecting an answer. No
response all day.
Hurumph!
Get one and ohm it out.
No kidding, that may be the only way :-(
Just made a CAD model for a 100-TQFP processor. Now I know why I chose
to become an analog guy and not a digital one.
Do you mean a PCB decal, or an actual Autocad sort of thing?
PADS makes IC decals really fast, for sort of standard things with
rows of numbered pins.
Are you doing 3D Solidworks sort of physical modeling? It is fun to
finally spin that stuff around in space, or take a virtual walk under
the IC pins.
No, just the schematic library part and footprint. A hundred pins, most
of which have names like this:
(OC0A/OC1C/PCINT7)PB7
One typo and all hell can break loose because the routing resources in
those uCs are sparse and can be unforgiving. Just had a major
re-shuffling in one of them on another project, not because of an error
but for a feature change. When those get maxed out in port pins the
design can slow down as much as Van Ness at rush hour, mainly because of
routing compromises.
You *should* be able to either grab the names from a spreadsheet or
cut-n-paste from a datasheet. The vendors often have models already built
that can be used for a starting place, too.
Only for some CAD packages, if at all. My CAD has a lot of the Atmels,
just not this big one.
which one?

... OTOH, our CAD people demand that
chips look on the schematic like they do on the board - no functional
partitioning (except BGAs, for some reason).
I insist on the same, I really hate netlist-style schematics where the
front axle is on page 17 which the left front wheel it on page 32.
Exceptions are logic gate and opamp multi-packs, of course. And I never
use large BGAs, those can spell doom in a hi-rel environment.

isn't reliabily and BGAs something that was perfected many years ago?
Sure, at least in the larger packages. Joerg is living in the '80s. They
even worked well then but many didn't have the process down.

for something like a big FPGA I think it it makes sense to put core
power, jtag
configuration and such on one symbol and each bank on a separate
symbol
Agree 100%. Even "small" 144-pin QFPs are a mess when they're shown as one
big box on a page with wires everywhere. Joerg probably doesn't like busses,
either (someone here objected to them a while back).

Actually I do like buses a lot. Especially the ones with comfy seats and
WiFi on board ... Just kidding, I do like buses on schematics.
Busses where the contents are not similarly named (not Bus[0:11], rather
BusWr, BusRd, BusEn,...)?
If it's clear what the bus does I am ok with that. But I prefer
BUSWR[0:11], BUSRD[0:11], BUSEN[0:3], and so on. Consistency is
important in schematics.
Huh? Do you have twelve bus writes?

That usually means how many lines a bus has. Yes, some of mine have 12
lines.
Not how many, but their number ranges. BUSWR[0:11] would contain 12 lines
named BUSWR0, BUSWR1, ...,BUSWR11. A rather unusual thing? Do you support
busses within busses? Iv'e never seen that, either.

That's probably because you've never designed an ultrasound beamformer

Very normal thing there. For example, the bus CKL[0:31] contains 16
differential bus lines that go to 16 different locations, FIFOCLK[0:15]
contains 16 single-ended FIFO clocks.

TOTALLY different thing. In our case, thought, we'd name them FIFOCLK0+,
FIFOCLK0-, FIFOCLK1+, FIFOCLK1-.... Actually, I use a format like,
Source_Function_Type[N=Negative]. But you didn't answer my question.

Then it's not clear to me what you mean. In ultrasound naming them like
you suggest is not practical, there are simply way to many channels. So
we name them like I wrote.

Yep. Guess who's fault it is, too.

Whoever some trial lawyer pounds into settling.

Never underestimate the ignorati.

Yeah :-(

He'll tax you into oblivion before you can leave and lay claim to everything
you ever make. It's the leftist's way.

Let's see what Nov-6 brings. Maybe people do wake up.

 

[Joerg]

[email protected] wrote: [snip]

Wait until Obama is done with you.

He may not have another chance anymore. At least the recent polls do not
look good for him.

Also, if it gets to be really bad folks like us can easily pick up
stakes and move to some tropical place. Where there is no winter.
Nowadays with Internet and Fedex it doesn't matter much where a
consultant's office is located.

My wife goes apoplectic every time I mention that survival mechanism,
saying, "What about the grandkids"? And I reply, "Why do you think
they make airplanes?" ;-)

Same here. Plus learning yet another language isn't too appealing
either. Eventually you'll have to speak Patois or at least the usual
Spanish-French mix, otherwise you'll never be one of them.

There is a downside for me though. For EMC jobs on bigger equipment I
often have to be on site and that's a challenge depending on location.
Well, as long as a Fedex freighter gets there once a week. Some of the
passenger flights I've seen there would scare the heck out of my wife. I
remember an American pilot standing next to me watching an old
twin-radial lumbering in. Pounding rain, lightning, fierce sidewind, the
occasional flame shooting out of the exhausts. "This dude is nuts!"

 

[Joerg]

[email protected] wrote:
[snip]
Wait until Obama is done with you.
He may not have another chance anymore. At least the recent polls do not
look good for him.

Also, if it gets to be really bad folks like us can easily pick up
stakes and move to some tropical place. Where there is no winter.
Nowadays with Internet and Fedex it doesn't matter much where a
consultant's office is located.
My wife goes apoplectic every time I mention that survival mechanism,
saying, "What about the grandkids"? And I reply, "Why do you think
they make airplanes?" ;-)

Same here. Plus learning yet another language isn't too appealing
either. Eventually you'll have to speak Patois or at least the usual
Spanish-French mix, otherwise you'll never be one of them.

There is a downside for me though. For EMC jobs on bigger equipment I
often have to be on site and that's a challenge depending on location.
Well, as long as a Fedex freighter gets there once a week. Some of the
passenger flights I've seen there would scare the heck out of my wife. I
remember an American pilot standing next to me watching an old
twin-radial lumbering in. Pounding rain, lightning, fierce sidewind, the
occasional flame shooting out of the exhausts. "This dude is nuts!"

I love DC3's. They belch flame, but somehow fly at nearly zero
air-speed while landing ;-)

The old ones had flaming take-offs a lot:

 

[Joerg]

Jim Thompson wrote:
[email protected] wrote:
[snip]
Wait until Obama is done with you.
He may not have another chance anymore. At least the recent polls do not
look good for him.

Also, if it gets to be really bad folks like us can easily pick up
stakes and move to some tropical place. Where there is no winter.
Nowadays with Internet and Fedex it doesn't matter much where a
consultant's office is located.
My wife goes apoplectic every time I mention that survival mechanism,
saying, "What about the grandkids"? And I reply, "Why do you think
they make airplanes?" ;-)

Same here. Plus learning yet another language isn't too appealing
either. Eventually you'll have to speak Patois or at least the usual
Spanish-French mix, otherwise you'll never be one of them.

There is a downside for me though. For EMC jobs on bigger equipment I
often have to be on site and that's a challenge depending on location.
Well, as long as a Fedex freighter gets there once a week. Some of the
passenger flights I've seen there would scare the heck out of my wife. I
remember an American pilot standing next to me watching an old
twin-radial lumbering in. Pounding rain, lightning, fierce sidewind, the
occasional flame shooting out of the exhausts. "This dude is nuts!"
I love DC3's. They belch flame, but somehow fly at nearly zero
air-speed while landing ;-)

The old ones had flaming take-offs a lot:

That's a Lockheed L1049. I actually did some stuff for the L1011.

My first flight on a DC3 scared me s...less. I wasn't used to seeing
glowing engine blocks :-(

Sometimes it goes wrong:

 

[[email protected]]

[email protected] wrote:

[email protected] wrote:

[email protected] wrote:

[email protected] wrote:
[email protected] wrote:
John Larkin wrote:
John Larkin wrote:
Jim Thompson wrote:
03:12 -0700, John Larkin
I'm on my third laptop right now. Every time I plugged my Dell's "fat
snake" into the wall, I drew quite an arc. The Lenovo's arc was not
noticeable, but now I get a noticeable arc with my new HP -- not as
big as the Dell's, however.
I know FA about switch mode power supplies, obviously, so I wonder
1. What produces the arc?
2. Why would different power supplies produce different arcs (does it
just depend on output power capability)?
3. Why is there no arc when I pull the plug from the outlet?
Dumb switching power supplies have a bridge rectifier and a big
electrolytic filter capacitor. If you plug them in near the peak of
the AC line waveform, the charging current will spark.
Better supplies, with inrush limiters, or PFC (power factor corrected)
front-ends, have much less inrush charge.
Ask Jim for details. He is *so good* at designing switching power
supplies.
Indeed I am >
I like the ucc28019a. works like a champ. Undervoltage lockout too
Cheers
So does the L6561. But poorly documented and no model; and ST ignores
my pounding on their door >
If I could make major changes I'd design ST out _forever_!
Might be the new normal. I want to design in a National video driver,
LMH6722. Has a thermal pad under its belly. In the datasheet they forgot
to mention where its s'posed to be connected to. Probably V- but I'd
rather make sure. Filed a support ticket with the new owner TI on 10/2.
Got a service request number.
Today is 10/8 and (finally! ... or so I thought) there was a message in
the inbox this morning. A form letter, merely saying that, tada, a
service request number has been issued. New number: Same as the old number.
So I responded politely as to when I might be expecting an answer. No
response all day.
Hurumph!
Get one and ohm it out.
No kidding, that may be the only way :-(
Just made a CAD model for a 100-TQFP processor. Now I know why I chose
to become an analog guy and not a digital one.
Do you mean a PCB decal, or an actual Autocad sort of thing?
PADS makes IC decals really fast, for sort of standard things with
rows of numbered pins.
Are you doing 3D Solidworks sort of physical modeling? It is fun to
finally spin that stuff around in space, or take a virtual walk under
the IC pins.
No, just the schematic library part and footprint. A hundred pins, most
of which have names like this:
(OC0A/OC1C/PCINT7)PB7
One typo and all hell can break loose because the routing resources in
those uCs are sparse and can be unforgiving. Just had a major
re-shuffling in one of them on another project, not because of an error
but for a feature change. When those get maxed out in port pins the
design can slow down as much as Van Ness at rush hour, mainly because of
routing compromises.
You *should* be able to either grab the names from a spreadsheet or
cut-n-paste from a datasheet. The vendors often have models already built
that can be used for a starting place, too.
Only for some CAD packages, if at all. My CAD has a lot of the Atmels,
just not this big one.
which one?

... OTOH, our CAD people demand that
chips look on the schematic like they do on the board - no functional
partitioning (except BGAs, for some reason).
I insist on the same, I really hate netlist-style schematics where the
front axle is on page 17 which the left front wheel it on page 32.
Exceptions are logic gate and opamp multi-packs, of course. And I never
use large BGAs, those can spell doom in a hi-rel environment.

isn't reliabily and BGAs something that was perfected many years ago?
Sure, at least in the larger packages. Joerg is living in the '80s. They
even worked well then but many didn't have the process down.

for something like a big FPGA I think it it makes sense to put core
power, jtag
configuration and such on one symbol and each bank on a separate
symbol
Agree 100%. Even "small" 144-pin QFPs are a mess when they're shown as one
big box on a page with wires everywhere. Joerg probably doesn't like busses,
either (someone here objected to them a while back).

Actually I do like buses a lot. Especially the ones with comfy seats and
WiFi on board ... Just kidding, I do like buses on schematics.
Busses where the contents are not similarly named (not Bus[0:11], rather
BusWr, BusRd, BusEn,...)?
If it's clear what the bus does I am ok with that. But I prefer
BUSWR[0:11], BUSRD[0:11], BUSEN[0:3], and so on. Consistency is
important in schematics.
Huh? Do you have twelve bus writes?

That usually means how many lines a bus has. Yes, some of mine have 12
lines.
Not how many, but their number ranges. BUSWR[0:11] would contain 12 lines
named BUSWR0, BUSWR1, ...,BUSWR11. A rather unusual thing? Do you support
busses within busses? Iv'e never seen that, either.

That's probably because you've never designed an ultrasound beamformer

Very normal thing there. For example, the bus CKL[0:31] contains 16
differential bus lines that go to 16 different locations, FIFOCLK[0:15]
contains 16 single-ended FIFO clocks.

TOTALLY different thing. In our case, thought, we'd name them FIFOCLK0+,
FIFOCLK0-, FIFOCLK1+, FIFOCLK1-.... Actually, I use a format like,
Source_Function_Type[N=Negative]. But you didn't answer my question.

Then it's not clear to me what you mean. In ultrasound naming them like
you suggest is not practical, there are simply way to many channels. So
we name them like I wrote.

I don't even know if we can name signals in bundles with a range, but we *can*
have totally different names within a single bus. CLK, and DATA1, DATA2,
DATA3,... ,DATA1001, WRITE, READ, ENABLE, +5V, GND can all be in the same bus.
In fact, I'm not sure what busses accomplish other than showing up on the
schematic as one line. The good side is that we don't have to use stupid
naming conventions like having evens be the '+' and odds the '-' of
differential signals. The sign can be part of the element name. Any signal
can be part of a bus. The down side is that it doesn't matter what the bus
does, everything is connected by name. It's worse than OrCAD but it's pretty
bad this way, too.

Whoever some trial lawyer pounds into settling.

The boss is going to point at the engineer. Shoulda checked that! Grrr.

Yeah :-(




Let's see what Nov-6 brings. Maybe people do wake up.

I sure hope so. It's all over otherwise. I'd like to work another ten years
but that's not likely to happen if Obummer has his way.

 

[Joerg]

[...]

Oh, we can delete parts from the PADS library, and sometimes do. We
could, but don't, delete parts from our inventory database, which is a
different thing.

Certainly it's a different thing. I'll bet it's marked so your purchasing
can't buy it, too. These components aren't marked in any way. They're
perfectly good parts, as far as the capture program is concerned.

Like I said, this is just a small part of the broken system. It's amazing
that anyone is worried about the Asians.

That's what people in Detroit said about 40 years ago. Later this turned
to "Oh s..t!" but it was too late and their companies fell apart. We had
to bail them out because of that major mistake.

The same happened to Radio/TV manufacturers, VCR manufacturers, LCD
manufacturers and so on, except their companies croaked and nobody
bailed them out. Some of this was clearly avoidable.

 

[[email protected]]

[email protected] wrote:

[email protected] wrote:

[email protected] wrote:

[email protected] wrote:

[email protected] wrote:

[email protected] wrote:
[...]

... OTOH, our CAD people demand that
chips look on the schematic like they do on the board - no functional
partitioning (except BGAs, for some reason).
I insist on the same, I really hate netlist-style schematics where the
front axle is on page 17 which the left front wheel it on page 32.
Of course not. All the wheels go on page-1 (with the tires/wheels/and nuts in
the hierarchy on page 2-5) and the Engine goes on page 12, with the exhaust on
page 88.

Exceptions are logic gate and opamp multi-packs, of course.
Gates and opamps are drawn symbolically but everything else is a single
physical square box. UGH! It makes *really* ugly schematics. Impossible to
follow.

That's in fact how most people want schematics. Including myself.
Most? GOt a cite for that? None of the companies I've worked for wanted
anything that ugly. It makes the schematic unreadable.

Most as in pretty much all my clients. I don't think there is any
opinion poll data for that available.
Sorta my point, though if I'd shown up with a schematic like that, no one
would have hired me. They want their documentation to describe how the widget
works.

My schematics do describe how it works. Analog guys live that way.
If there is a huge box on the page and nothing else, you are *not* describing
how it works. It's no better than a netlist. Worse, actually, because you
have to trace wires to find out which signals they're tied to.

I see that differently. There is a uC on that page and it shows all the
stuff that goes there. If I want to see the circuitry that makes
MODESYNC or whatever all it takes is to go to that pages. Either that's
written right next to it or one uses the find function.
OTOH, if you want to know what resources in the micro are being used to drive
MODESYNC, you're screwed.

I don't need to know that from a schematic. At the beginning of a
project I stake my claims to timers, PWMs, interrupt-capable pins, ADC
channels and whatnot. That gets listed and goes right into my module
spec before a single brush stroke happens in the schematic. I strongly
believe in top-down design.

You do, but what about the next guy? If you're conveying all information
outside the schematic, then there's no need for a schematic. Just use a
netlist.

Strange, they all understood this kind of stuff even when they didn't
have the module spec at hand. Since about 25 year. It's also how my
clients always used to do it, and that's a lot of companies by now.

25 years ago not many had 1000 pin modules (and those of us who did, certainly
split the blocks into organized parts. You already admit that you split up
gates and opamps. UCs are just as important.

Again, there is a schematic and a module spec. No ratsnest.

You have one block with hundreds of connections with random pins and power
connections (capacitors shown locally). When you wire all this together into
a system it *is* a rats nest. It can't be helped. Splitting the block into
smaller, functional, pieces alleviates this a *lot*. The memory bus can be on
a separate page with its 64 address and 64 data pins organized, in order. Few
will ever have to look at it and it won't mess up the more important signals.

Maybe you guys should use eyeglasses

Good grief. Actually, I do have a problem tracking lines across a page. I'm
always swapping pins. I just can't see the swap unless I already know it's
there.

The 100PQFP I am using right now doesn't even fill 1/10th of a regular
letter A here. So how many pins do yours have? 3000?

No wonder you still use such poor practices. You think 100 is big. I have at
least ten parts on a schematic larger than that. The DSPs are >300 pins (one
500 and one >700). We also have several QFP144s. It's not *so* bad with the
dinky 38pin flat-packs but it's still a mess trying to squeeze in terminations
and capacitors next to the pins, since they're not pinned out logically.

Fact is, lots of field failures and quite a few smart people turned this
into new business opportunities.

Evidently there are a lot of idiots. It's done in the highest reliability
industries.

[...]

No, it certainly isn't. BGAs are *very* reliable. The military wouldn't be
using them otherwise. They don't do RoHS and that's a RPITA, but they have
*no* problems with BGAs. Automotive, another harsh long-life environment,
ditto.

Don't get me started on automotive electronics ...

Oh, well. BGAs *are* reliable.

[...]

At least the tax-and-spenders were embarrassed into putting it up for a
referendum.

Now the dems have resorted to calling taxes "fees", in order to get
around the 2/3 majority requirement.

Sure. That was easily predicted. Traffic tickets were an early "revenue
enhancement" technique. Red-light cams make it much cheaper to collect.
Rampant big-brotherism. No thanks. You can keep Californica.

 

[[email protected]]

On Wed, 10 Oct 2012 15:44:56 -0400, "[email protected]"

On Wed, 10 Oct 2012 11:38:45 -0700, John Larkin

On Wed, 10 Oct 2012 13:46:33 -0400, "[email protected]"

[...]

Oh, and there is no way to obsolete a component from the database. We have
thousands of capacitors to go through that the manufacturer no longer makes.
These have to be scrubbed every time we put a BOM together.
We never delete a part from our database, but some parts are
"retired." They are physically removed from the stock room, and either
disposed of, or stashed elsewhere in case engineering might want to
play with a few for some reason.
Nope. No way to "retire" them from the schematic database. Everything shows
up the same.
Oh, we can delete parts from the PADS library, and sometimes do. We
could, but don't, delete parts from our inventory database, which is a
different thing.

Certainly it's a different thing. I'll bet it's marked so your purchasing
can't buy it, too. These components aren't marked in any way. They're
perfectly good parts, as far as the capture program is concerned.

Like I said, this is just a small part of the broken system. It's amazing
that anyone is worried about the Asians.

That's what people in Detroit said about 40 years ago. Later this turned
to "Oh s..t!" but it was too late and their companies fell apart. We had
to bail them out because of that major mistake.

It's exactly the opposite. *THEIR* processes *suck*.

The same happened to Radio/TV manufacturers, VCR manufacturers, LCD
manufacturers and so on, except their companies croaked and nobody
bailed them out. Some of this was clearly avoidable.

....and look where Japan is now.

 

[[email protected]]

That's why I wrote "again". We bought five cords also last year, and
blew through all of that. Lots of people in CA also have heat pumps but
that was a major mistake. Because the state government became hardcore
leftist so now they tax the dickens out of these poor folks, via reverse
tiers on the power bill. A meager baseline quantity costs around
15c/kWh. With a heatpump or A/C you exceed that within days and then
prices quickly shoot up to something like 35c/kWh. I knew an old lady
who was very skinny, so needed it warm in the house in her 90's. She
paid north of $1000/month in winter. That's insane, I won't do that.

That's avocados and nuts. Power's $.10/kWHr in my neck of the woods,
for now anyhow, no limit. (from coal). Maybe we'll switch to solar
after the Barackolypse, in which case I'll be burning wood.

I don't use much, only about $20 base, and an extra $25 or so a month
in winter, the time of year my house gets and stays cold.

 

[Jasen Betts]

If someone has a free moment, I'd like to know:

I'm on my third laptop right now. Every time I plugged my Dell's "fat
snake" into the wall, I drew quite an arc. The Lenovo's arc was not
noticeable, but now I get a noticeable arc with my new HP -- not as
big as the Dell's, however.

I know FA about switch mode power supplies, obviously, so I wonder

1. What produces the arc?

Electric current, "inrush current" is the normal name for a high
current that occusr when a device is connected its supply.

2. Why would different power supplies produce different arcs (does it
just depend on output power capability)?

It depends more in the internal design of the powersupply, and the
condition of the contacts.

3. Why is there no arc when I pull the plug from the outlet?

the input stage of the powersupply is mostly capacitative
it reacts stronly to a sudden change in voltage, but weakly to a
change in current