Driving a CRT monitor flyback transformer with squarewave

[Sylvia Else]

You need to lookup how a cascade circuit works.

If you're thinking about cascaded amplifiers, that's not going to help
the OP in the slightest when it comes to managing the high voltage.

If you have something else in mind, post a link to something describing it.

Of course, it's always easy to post vague comments implying ignorance on
the part of some other person, while not saying enough to allow anyone
to contradict you.

Sylvia.

 

[Fredxx]

If you're thinking about cascaded amplifiers, that's not going to help
the OP in the slightest when it comes to managing the high voltage.

If you have something else in mind, post a link to something
describing it.
Of course, it's always easy to post vague comments implying ignorance
on the part of some other person, while not saying enough to allow
anyone to contradict you.

Sylvia.

I have seen two transistors cascaded in a Sony Trinitron, where the voltage
experienced between them was split using a capacitor across each which made
up the resonant circuit. Each was driven by a pulse transformer.

 

[Don Klipstein]

I have seen two transistors cascaded in a Sony Trinitron, where the voltage
experienced between them was split using a capacitor across each which made
up the resonant circuit. Each was driven by a pulse transformer.

Did they have problems with high cost or low beta of 1500V transistors?

 

[Sylvia Else]

Cascode is what I meant to say, hope that clears it up.

Well, it clarifies your intent.

I don't see that it addresses the problem, though. Referring to the
diagram in

http://en.wikipedia.org/wiki/Cascode

and paying due attention to the comment about biasing...

In the transition from the on state to the off state, the voltage on the
drain (Vout) that's connected to the transformer primary will rise from
near zero to whatever high voltage is produced by the primary. In the on
state, the gate of that transistor will also be not far from zero. In
the absence of some special handling of the gate voltage in the
transition to the off state, the drain-gate voltage will rise beyond the
tolerance of the transistor, which will fail.

Sylvia.

 

[Fredxx]

Did they have problems with high cost or low beta of 1500V transistors?

I have no idea, but it was in the early days of solid state TVs. I would
guess they went for the most cost effective method to cope with the flyback
voltage.

 

[josephkk]

Well, it clarifies your intent.

I don't see that it addresses the problem, though. Referring to the
diagram in

http://en.wikipedia.org/wiki/Cascode

and paying due attention to the comment about biasing...

In the transition from the on state to the off state, the voltage on the
drain (Vout) that's connected to the transformer primary will rise from
near zero to whatever high voltage is produced by the primary. In the on
state, the gate of that transistor will also be not far from zero. In
the absence of some special handling of the gate voltage in the
transition to the off state, the drain-gate voltage will rise beyond the
tolerance of the transistor, which will fail.

Sylvia.

Glad to find someone was awake. The term for HV V(ce) splitting usage is
totem pole. Also used (borrowed) to describe TTL outputs by similarity.
Doing totem pole with MOS transistors includes some interesting design
trade-offs.