Which of the figure for DMA block diagram is correct? I am confused (confusion in comments)

[shivajikobardan]

(I tried uploading figures but it failed)
Figure 1-:

https://preview.redd.it/kvlr9nc07ru...bp&s=4ca274bce1194051e447698f7082033d04debcec

Figure 2-:
https://preview.redd.it/lst03e267ru...bp&s=c15082259cbe8db29017b5d05841eb983bc1786c

My confusion-:



in first figure how does data transfer between I/O and memory occurs? Neither IO can send data nor receive data according to that figure as it is not connected to memory.

(Does it go the DMAC route??) I am still confused because I can't digest those 3 lines from DMAC and IO device. I think there must be only 2 lines there DREQ from io to dmac and DACK from dmac to io.

in the second figure, why there is way from memory to io only but what if I want to transfer data from io to memory? how do we do that?

 

[AnalogKid]

In the first figure, data transfers between memory and I/O through the DMA controller. DMA means Direct Memory Access, so it has a complete set of address and data bus transceivers to drive the memory array independent of the CPU. The three lines between the DMAC and I/O are the address, data, and control signals necessary for that I/O device. For example, if it has 4 internal 8-bit registers, then you would need 2 address lines, 8 data lines, and some read and write strobes.

in the second figure, why there is way from memory to io only but what if I want to transfer data from io to memory? how do we do that?

Not all I/O devices are bidirectional. The drawing implies that that I/O device is an output-only type, such as a display or relay actuators.

ak