M
MooseFET
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Maybe even better, since it gets rid of the peak detector!
The down side I see, in hardware, is the need for 16 bit adders to do
the integration for an 8 bit input.
You don't need real 16 bit adders because the ADC is much slower than
HC logic. You can use a serial adder.
Another idea would be to have a 20MHz clock and a 20KHz saw tooth.
Any time the voltage is greater than the sawtooth, the counter is
enabled. By using a somewhat perverted sort of ADC, you get the
summing action with just counting. It is only good to about 10 bits
on the ADC but perhaps that is enough.
Here's what I've got so far:
news:bbjqj4do2pnesinvd9lh2c1q2tj7665uk4@4ax.com
Unfortunately I can't deal with the URL. Perhaps if I wasn't so lazy
I would have a real news reader, but if a sled had wheels it would be
a wagon too.
I did it in 4 bits instead of 8 because I thought that would make it
simpler but, in actuality, doing it in 8 ( using an HC688 for the
magnitude comparator, a couple of HC273's for the input latches, an
HC40103 for the counter and a single HC175 instead of the HC74's) would
have resulted in one less chip.
If I get ambitious I'll redraw it...![]()
Did someone already say "use a PIC" yet?. This sort of thing would be
falling off a log simple with something like Cygnal F120 processor.
You could sample the ADC at 40KHz and use one of the DACs to make the
output pulses. With just some lightning protection and a 3.3V
regulator, the who thing would be done.