Well I'm not measuring the speed of light - but +/- 100ppm or so would
be good.
For any future critical time keeping applications I could use an RTC
chip or whatever.
Not necessarily - just simple and stable - basically just solder it in
and off I go...
Precisely - and the IO bank onto which this clock comes is driving
some 2.5V DDR, so I don't have a lot of room to manoeuvre.
The FPGA is actually hosting a soft core microprocessor (running our
linux port no less!), so I'm just generating a processor clock with
it. The FPGA has a digital clock synthesiser inside it that I could
use, but I'd prefer not to "waste" one if I don't need to (since the
DDR drive logic needs a couple as well).
But I should ask... what are my options for simple and stable 2.5V
oscillators and lower frequencies (24Mhz, 66Mhz, ...)??
Farnell stock two 100MHz crystal-controlled oscillators in SMD
packages - order codes 316-0282 (from C-MAC) and 329-8504 (from
SaRonix). Both are intended to run from 3.3V supplies.
IIRR some low voltage FPGA's can tolerate input voltages that go
higher than their supplies, so you might not need to divide or diode
clamp the outputs.
At 100MHz, low-voltage differential signals (LVDS), which can be
terminated without dissipating too much heat, are an attractive
option, and some FPGAs offer inputs which can be configured to accept
such signals.
The C-MAC web-site
http://www.cmac.com/mt/databook/
lists SMD oscillators offering ECL and PECL outputs, which have the
right sort of limited voltage swing, but probably not at the right DC
level - you might be able to do something with capacitor or
transformer coupling. I'd use a couple of wide-band transistors in
SOT-23 packages(BFR92 for NPN, BFT92 for PNP) to do any necessary
level and amplitude switching, but I've done it before.
