Hi Steve,
I apologise for the questions. You helped me with the negative programmable current source. Would you be able to answer a few questions please.
1. My thoughts were to use a n channel device with drain to 0V and source provide the negative voltage. As the drain is more positive than the source the fet should work. Provided Vgs is greater than Vth of the FEt. Is this correct? In the schematic that you helped me with would vgs also be negative with respect to vth?
2. Please could you let me know how you derived the equations to work out the current? I am a little confused.
3. My understanding of the circuit is that, the voltage developed across the sense resistor is fed back and compared to the voltage from the DAC. The opamp fights to keep the voltages the same at both inputs, due to virtual earth concept. If that is correct, how can the opamp drive the FET, or will there be a slight difference of a few mV, which is enough to drive the FET?
4. In this configuration, is the FET in the linear or saturation region? I thought it was the saturation, because drain current is flat irrespective of Vds. Is this assumption correct?
I would appreciate your help. I have to do a presentation and want to know everything about this circuit operation.
Best regards,
Rajinder