Phase Margin Question for Phase Locked Loops

[Tim Wescott]

It already does work!

Then why do you need any help?

If the circuit provides negative feedback at DC and has insufficient
phase margin at some frequency, then slapping in an inverter will give
you positive feedback, with some _very_ peculiar results. If you're
using an XOR or other mixer for the phase detector then it'll invert
automatically, and you won't be changing the gain/phase relationship of
the loop.

You've only designed with passive, single
ended filters?

No, a few more than that: Passive, single ended filters. Active filters
using op-amps, inverting, non-inverting, and double to single-ended.
Closed-loop control systems using several different types of
microprocessors, DSPs and DSPs roped to FPGAs.

I haven't used pneumatics, mechanical amplifiers, magnetic amplifiers or
dynamotors yet, but you never know.

Most active PLL filters are inverting.

From what population of PLLs are you drawing this "most"? If you're
working with the current crop of PLL-based synthesizers-on-a-chip then
using an inverting filter means you have to reverse the sense of the VCO
command/frequency relationship, or you need to flip a bit in the phase
detector someplace. If you're using an XOR phase detector then the
point is moot, of course.

 

[[email protected]]

The up/down steering logic between the phase detector and the charge
pump is reversed to cancel the inversion in the active loop filter.

F(s) may be -A*(s+B)/s but kPD is really -kPD
The negative signs cancel out.

The open loop gain is

G(s) = kPD * A*(s+B)/s * kVCO/s

i.e. two poles at the origin and a strategically positioned zero.

The phase is +180 until the zero kicks-in. The phase then gradually
drops to +90. Phase margin is how far below 180 it has fallen, at the
frequency where magnitude of G passes through unity.

You mean the magnitude of [GH] through unity.
GH=Kpd*Kfilter*Kvco/(s*N)


Slick

 

[[email protected]]

[email protected] wrote:

...


That's fine. Still, you don't understand why.

I most certainly do. See Barkhausen in my
original post.



An inverter between the

error signal and the loop is necessary to achieve negative feedback. The
inverter provides 180 degrees and the integrator by itself eats half of
that, leaving 90 degrees phase margin, the best one can do.

Well, we have two integrators in this case, the
op-amp with capacitive feedback and the VCO.


Slick

 

[[email protected]]

Then why do you need any help?

We would like to improve the
current design, if we could. But
it certainly already works. We
would like to omit some fast acquisition
1N4148 back-to-back diodes that we have
in parallel to the output resistor, as
they supposedly distort our audio modulation
at low freq. However, the lock-up time
is slower without them, so we'd like to
adjust the poles and zeros for faster
lock without them, without losing too much
phase margin/stability.

From what population of PLLs are you drawing this "most"? If you're

working with the current crop of PLL-based synthesizers-on-a-chip then
using an inverting filter means you have to reverse the sense of the VCO
command/frequency relationship, or you need to flip a bit in the phase
detector someplace. If you're using an XOR phase detector then the
point is moot, of course.

Well, that was my orginal question,
do all phase detectors, whether XOR or
phase/freq, have the 180 degree phase shift
that you need. Apparently, yes.


Slick

 

[Andrew Holme]

The up/down steering logic between the phase detector and the charge
pump is reversed to cancel the inversion in the active loop filter.

F(s) may be -A*(s+B)/s but kPD is really -kPD
The negative signs cancel out.

The open loop gain is

G(s) = kPD * A*(s+B)/s * kVCO/s

i.e. two poles at the origin and a strategically positioned zero.

The phase is +180 until the zero kicks-in. The phase then gradually
drops to +90. Phase margin is how far below 180 it has fallen, at
the frequency where magnitude of G passes through unity.

You mean the magnitude of [GH] through unity.
GH=Kpd*Kfilter*Kvco/(s*N)

Yes. I forgot the N. I was thinking of a loop I did with N=1. I actually
prefer to use G(s) for open-loop gain and H(s) for closed loop gain; so,
personally, I would write it as:

G(s) = kPD * A*(s+B)/s * kVCO/s * 1/N

You say in another post that you want to improve the lock time. I recently
designed a loop that had to lock very quickly. I found it useful to do
Bode plots and step response using SCILAB.

 

[[email protected]]

Yes. I forgot the N. I was thinking of a loop I did with N=1. I actually
prefer to use G(s) for open-loop gain and H(s) for closed loop gain; so,
personally, I would write it as:

G(s) = kPD * A*(s+B)/s * kVCO/s * 1/N

Most of the literature uses G(s) for the forward gain
and H(s) for the feedback path.

But, to each their own.

You say in another post that you want to improve the lock time. I recently
designed a loop that had to lock very quickly. I found it useful to do
Bode plots and step response using SCILAB.

What sort of phase margin did you shoot for?
And what type of filter did you use?


Slick