J
Jamie Morken
Hi,
What is a good way to increase the stability of a SMPS feedback loop?
I have a SMPS that uses this algorithm:
if inductor current > current_limit, pulse off
Duty cycle = ((desired voltage - current voltage) * gain) - (Inductor
current * gain2)
I am not sure how to put in the analog or digital adjustments for making
sure the feedback loop is stable.
I am reading up on these pages but am not sure how to implement this on
a PCB, either analog or in an FPGA:
http://en.wikipedia.org/wiki/Phase_margin
http://en.wikipedia.org/wiki/Bode_plot#Gain_margin_and_phase_margin
cheers,
Jamie
What is a good way to increase the stability of a SMPS feedback loop?
I have a SMPS that uses this algorithm:
if inductor current > current_limit, pulse off
Duty cycle = ((desired voltage - current voltage) * gain) - (Inductor
current * gain2)
I am not sure how to put in the analog or digital adjustments for making
sure the feedback loop is stable.
I am reading up on these pages but am not sure how to implement this on
a PCB, either analog or in an FPGA:
http://en.wikipedia.org/wiki/Phase_margin
http://en.wikipedia.org/wiki/Bode_plot#Gain_margin_and_phase_margin
cheers,
Jamie