Fred Bartoli <" "> wrote:
Spehro Pefhany a écrit :
On Wed, 25 Nov 2009 16:10:31 +0100, Fred Bartoli <" "> wrote:
Hmmm, even simpler...
[snip great, simple antilog circuit]
Thanks for calculating the values I was to lazy to compute.
Now I can reveal the whole world the last simplification bit (ahem) :
that is, if you make sure the duty cycle is far enough from 100%, which
sure would be with a 100Hz clock, then you can just delete the 1V
reference and make it a simple resistor (with a small bypass cap) so
that the 6.02V reference with the 24K9/Rsource divider just gives you
the wanted 1V at the capacitor top.
Adjust the source bypass cap to optimize the circuit behavior WRT the
mosfet charges. A value from the low tens of pF to maybe 1nF.
Also, please applause the effort I made in disclosing the resistor's
secret value (just had a cup of coffee
.
That would be:
24K9 10n
___ ||
6.02V >--|___|--+--||---.
| || |
| ===
Vout >---------. .--------+ GND
| | |
.-----. |
\+ -/ +-||
comparator \ / ->|| optim.
V +-||---. .---||-----.
| | | | ___ |
| '--------+--|___|---+
.--o--. | 4K96 |
GND -|D S Q|-------------' ===
| | GND
100Hz Clk >---|> -| ___
| R Q|---|___|--+-----> Flow
'--o--' | 200mV full scale
---
---
|
===
GND
Absolutely wonderful, I'm truly amazed how even elegant, simple
circuits can
often be optimized and refined even further!
Now talking about optimization: from this design, it would appear that
one
could swap the MOSFET and 4K96 resistor -- which would mean that the
internal discharge FET (using an ICM7555) can be used, doing away with an
external MOSFET altogether.