H
Hank
Hey, a real question from me (finally)!
I have a design that I want to make as minimal and cheap as possible. I am
already using an atmel mega32 8 bit microcontroller which runs at Fclk of 16mhz
and has 8 bit and 16 bit counters and pwm capability.
So...
I decided perhaps to use one of the 16 bit counters to create a 10 bit DAC using
an RC for charge storage and then an op-amp for buffering (pretty standard stuff
I guess).
From the atmel data sheet, in fast pwm mode, the pwm frequency will be Fclk /
(2^pwmbits), or for a 10 bit pwm resolution, 15.625khz.
I calculate this is going to give me a settling time of about 100mS using a 100k
resistor and a 0.1uF cap. I will have a ripple of about 8mV pp. The settling
time is fine, but 8mV of ripple with a theoretical resolution of 5V/1024 =~ 5mV
seems high. I could go with a larger resistor or cap to decrease ripple, but is
there a better way? (lol, other than just buying a 10 bit DAC, which takes the
minimalistic cheapo challenge out of it heh heh).
Thanks for any input.
I have a design that I want to make as minimal and cheap as possible. I am
already using an atmel mega32 8 bit microcontroller which runs at Fclk of 16mhz
and has 8 bit and 16 bit counters and pwm capability.
So...
I decided perhaps to use one of the 16 bit counters to create a 10 bit DAC using
an RC for charge storage and then an op-amp for buffering (pretty standard stuff
I guess).
From the atmel data sheet, in fast pwm mode, the pwm frequency will be Fclk /
(2^pwmbits), or for a 10 bit pwm resolution, 15.625khz.
I calculate this is going to give me a settling time of about 100mS using a 100k
resistor and a 0.1uF cap. I will have a ripple of about 8mV pp. The settling
time is fine, but 8mV of ripple with a theoretical resolution of 5V/1024 =~ 5mV
seems high. I could go with a larger resistor or cap to decrease ripple, but is
there a better way? (lol, other than just buying a 10 bit DAC, which takes the
minimalistic cheapo challenge out of it heh heh).
Thanks for any input.