I’m designing an eight Layer PCB Board that has LVDS signals in
frequency of 700Mbps. I have read lots of Document regarding Impedance
Controlled PCB routing. The desired impedance is 100 Ohm as I read the
device datasheet. But in some Application note I’ve seen that the
Impedance should be 75 ohm or 85 ohm. For example as I see in (part of
2.2.1) http://www.nxp.com/acrobat_download/applicationnotes/AN10373_1.pdf
the impedance is dependent to the number of layers.
What is the exact impedance that I should base my design on it?
My stackup is as follow(differential impedance is 87 ohm):
Top Layer: Differential signals width 9mil and 4mil for their gap
Substrate: 7mil
GND Plane
Substrate: 10mil
VCC Plane
Substrate: 10mil
Midlayer1: Differential signals width 5mil and 5mil for their gap
Substrate: 10mil
GND Plane
Substrate: 10mil
Midlayer2: Differential signals width 5mil and 5mil for their gap
Substrate: 10mil
GND Plane
Substrate: 7mil
Bottom: Differential signals width 9mil and 4mil for their gap
As you see the track width is differs by 4mil in top layer relative to
mid-layers. How can I change the Stackup that the track width be
closer to each other in different layers? Is there software that helps
me or a site that has some example of stackup?( I know that the
HyperLynx can do this but I don’t have much time to learn it and I’m
looking for other ways in the little time that I have.)
frequency of 700Mbps. I have read lots of Document regarding Impedance
Controlled PCB routing. The desired impedance is 100 Ohm as I read the
device datasheet. But in some Application note I’ve seen that the
Impedance should be 75 ohm or 85 ohm. For example as I see in (part of
2.2.1) http://www.nxp.com/acrobat_download/applicationnotes/AN10373_1.pdf
the impedance is dependent to the number of layers.
What is the exact impedance that I should base my design on it?
My stackup is as follow(differential impedance is 87 ohm):
Top Layer: Differential signals width 9mil and 4mil for their gap
Substrate: 7mil
GND Plane
Substrate: 10mil
VCC Plane
Substrate: 10mil
Midlayer1: Differential signals width 5mil and 5mil for their gap
Substrate: 10mil
GND Plane
Substrate: 10mil
Midlayer2: Differential signals width 5mil and 5mil for their gap
Substrate: 10mil
GND Plane
Substrate: 7mil
Bottom: Differential signals width 9mil and 4mil for their gap
As you see the track width is differs by 4mil in top layer relative to
mid-layers. How can I change the Stackup that the track width be
closer to each other in different layers? Is there software that helps
me or a site that has some example of stackup?( I know that the
HyperLynx can do this but I don’t have much time to learn it and I’m
looking for other ways in the little time that I have.)