Mathematically based method to increase bandwidth of ADC

[Abstract Dissonance]

I was thinking the other day about how to increase the usage of an ADC and I
came up with this idea. It is mathematically solid but I have no idea if it
is practical.

The idea is to use the fact that a shift in the frequency domain is
equivilent to multiplying by exp(+-I*a*t) in the time domain.

So by using that property we can shift the higher frequencies of the
function into a lower region that can be handled by the ADC. Sampling rate
can be increased by running ADC's in parallel.

To do this requres one to first compute the signal,

s_k(t) = [exp(I*k*O*t)*s(t)] ** [O/sqrt(2*Pi)*exp(I*(a +
O/2)*t)*sinc(O/2*t)]

where ** means convolution and [a,O] represents the interval of the
bandwidth of the ADC. (a represents the lowest frequency and O the highest)

So one would take k = 0 and pass it to one ADC, k = 1 to another, etc and
then to get the original signal back one just as to compute in the digital
domain,

s(t) = sum(exp(-I*k*O*t)*s_k(t),k=-oo..oo).

Thats basically it. The theory is very simple.

The hard part come with implementing it. First off, the circuitry that
actually computes the convolution and does the multiplication would have to
have enough bandwidth not to destory the signal and the time delay would
have to be taken into account. Theres also the issue with generating the
sin and cos waves to use in the exp() factors along with the sinc function.

the formula for s_k(t) does not involve information about s(t) except at the
point t so it is causal.

Certain approximations will, ofcourse, come into play like having to
restrict the convolution to a finite range(which will in effect make the
filtering non-ideal...which might be able to be taken care of after
conversion).


All this rests on how hard it is to implement the operational circuitry to
do the "shifting". Mathematically its easily provable that it works but
implementing the necessarily mathematical operations might be impossible
with circuits or might not be practical enough. (although I'm still
varifying the mathematics and making sure some things are correct)

If one can create a operational circuit that can do the above equation for
s_k(t) that can "out perform" the ADC(i.e., that it can compute s_k(t) that
will be good enough for the ADC). Then maybe we can try to impelement it and
see how well it works.

Overall it might be easier just to make a better ADC than the method I'm
proposing but thats why I'm asking since I don't have much experience with
implementing analog mathematics.

Jon

 

[Deefoo]

I was thinking the other day about how to increase the usage of an ADC and I
came up with this idea. It is mathematically solid but I have no idea if it
is practical.

The idea is to use the fact that a shift in the frequency domain is
equivilent to multiplying by exp(+-I*a*t) in the time domain.

So by using that property we can shift the higher frequencies of the
function into a lower region that can be handled by the ADC. Sampling rate
can be increased by running ADC's in parallel.

To do this requres one to first compute the signal,

s_k(t) = [exp(I*k*O*t)*s(t)] ** [O/sqrt(2*Pi)*exp(I*(a +
O/2)*t)*sinc(O/2*t)]

where ** means convolution and [a,O] represents the interval of the
bandwidth of the ADC. (a represents the lowest frequency and O the highest)

So one would take k = 0 and pass it to one ADC, k = 1 to another, etc and
then to get the original signal back one just as to compute in the digital
domain,

s(t) = sum(exp(-I*k*O*t)*s_k(t),k=-oo..oo).

Thats basically it. The theory is very simple.

The hard part come with implementing it. First off, the circuitry that
actually computes the convolution and does the multiplication would have to
have enough bandwidth not to destory the signal and the time delay would
have to be taken into account. Theres also the issue with generating the
sin and cos waves to use in the exp() factors along with the sinc function.

the formula for s_k(t) does not involve information about s(t) except at the
point t so it is causal.

Certain approximations will, ofcourse, come into play like having to
restrict the convolution to a finite range(which will in effect make the
filtering non-ideal...which might be able to be taken care of after
conversion).


All this rests on how hard it is to implement the operational circuitry to
do the "shifting". Mathematically its easily provable that it works but
implementing the necessarily mathematical operations might be impossible
with circuits or might not be practical enough. (although I'm still
varifying the mathematics and making sure some things are correct)

If one can create a operational circuit that can do the above equation for
s_k(t) that can "out perform" the ADC(i.e., that it can compute s_k(t) that
will be good enough for the ADC). Then maybe we can try to impelement it and
see how well it works.

Overall it might be easier just to make a better ADC than the method I'm
proposing but thats why I'm asking since I don't have much experience with
implementing analog mathematics.

Jon

Wel, you could digitize the signal first, do the calculations in the digital
domain, convert it back to analog and then digitize it following your scheme
;o)

Seriously, Nyquist states that the sample rate should be at least twice the
signal's _bandwidth_ (which is equivalent to saying "highest frequency" if
you start at DC). This means that you can undersample bandlimited signals
that do not go down too much, i.e. if there is empty space in the spectrum
where the alised signal can go without interfering with anything. In many
applications where high frequency signals have to be sampled these signals
do not go down to DC. If they do, cut up your signal (DC to f_max) in two or
more parts with (band-pass) filters and (under)sample their outputs. Apply
correction to taste in the digital domain.

--DF

 

[Abstract Dissonance]

Heres a short write up of the formulas involved

http://www.geocities.com/abstract_dissonance/ADC.pdf

 

[Abstract Dissonance]

I was thinking the other day about how to increase the usage of an ADC
and I
came up with this idea. It is mathematically solid but I have no idea if it
is practical.

The idea is to use the fact that a shift in the frequency domain is
equivilent to multiplying by exp(+-I*a*t) in the time domain.

So by using that property we can shift the higher frequencies of the
function into a lower region that can be handled by the ADC. Sampling
rate
can be increased by running ADC's in parallel.

To do this requres one to first compute the signal,

s_k(t) = [exp(I*k*O*t)*s(t)] ** [O/sqrt(2*Pi)*exp(I*(a +
O/2)*t)*sinc(O/2*t)]

where ** means convolution and [a,O] represents the interval of the
bandwidth of the ADC. (a represents the lowest frequency and O the highest)

So one would take k = 0 and pass it to one ADC, k = 1 to another, etc and
then to get the original signal back one just as to compute in the
digital
domain,

s(t) = sum(exp(-I*k*O*t)*s_k(t),k=-oo..oo).

Thats basically it. The theory is very simple.

The hard part come with implementing it. First off, the circuitry that
actually computes the convolution and does the multiplication would have to
have enough bandwidth not to destory the signal and the time delay would
have to be taken into account. Theres also the issue with generating the
sin and cos waves to use in the exp() factors along with the sinc function.

the formula for s_k(t) does not involve information about s(t) except at the
point t so it is causal.

Certain approximations will, ofcourse, come into play like having to
restrict the convolution to a finite range(which will in effect make the
filtering non-ideal...which might be able to be taken care of after
conversion).


All this rests on how hard it is to implement the operational circuitry
to
do the "shifting". Mathematically its easily provable that it works but
implementing the necessarily mathematical operations might be impossible
with circuits or might not be practical enough. (although I'm still
varifying the mathematics and making sure some things are correct)

If one can create a operational circuit that can do the above equation
for
s_k(t) that can "out perform" the ADC(i.e., that it can compute s_k(t) that
will be good enough for the ADC). Then maybe we can try to impelement it and
see how well it works.

Overall it might be easier just to make a better ADC than the method I'm
proposing but thats why I'm asking since I don't have much experience
with
implementing analog mathematics.

Jon

Wel, you could digitize the signal first, do the calculations in the
digital
domain, convert it back to analog and then digitize it following your
scheme
;o)

heh, yeah... that would work!

Seriously, Nyquist states that the sample rate should be at least twice
the
signal's _bandwidth_ (which is equivalent to saying "highest frequency" if
you start at DC). This means that you can undersample bandlimited signals
that do not go down too much, i.e. if there is empty space in the spectrum
where the alised signal can go without interfering with anything. In many
applications where high frequency signals have to be sampled these signals
do not go down to DC. If they do, cut up your signal (DC to f_max) in two
or
more parts with (band-pass) filters and (under)sample their outputs. Apply
correction to taste in the digital domain.

I think this is effectively similar to what I'm talking about but not
formulated in a precise mathematical model. (Although it might be exactly
equivilent to what I am doing).

I don't know much about undersampling but I don't see how you could recover
higher frequencies. If the ADC has a bandwidth of O then you are completely
screwed no matter how you sample if your signal has a higher bandwidth(here
the bandwidth of the ADC means the largest bandwidth it can sample
properly).

In effect though I think your undersampling is basically what I'm doing but
in the time domain by multiplying by the shift factor (exp(I*a*t)*s(t) <==>
hat(s)(w - a)).

I think what you are talking about is pretty much exactly what I'm doing
though except I didn't realize that you could undersample a bandlimited
signal yet recover the actual signal. The difference here is that your
signal has to have "room" in the bandwidth to do this while my method
doesn't rely on it(but basically same principle).

i.e. If, say, we have a signal that has a bandwidth between [a, a + 0] (0
here is omega and not 0... maybe not a good choice) then if a = 0 and we
sample the signal with an ADC that has bandwidth [zero, Omega] we can
recover the original signal by digitally shifting the frequency domain by
omega. I think this is what you are talking about and is basically what i'm
doing except I'm shifting the original signal's frequency domain too instead
of leaving it fixed.

Jon

 

[Deefoo]

I was thinking the other day about how to increase the usage of an ADC
and I
came up with this idea. It is mathematically solid but I have no idea

if
it

is practical.

The idea is to use the fact that a shift in the frequency domain is
equivilent to multiplying by exp(+-I*a*t) in the time domain.

So by using that property we can shift the higher frequencies of the
function into a lower region that can be handled by the ADC. Sampling
rate
can be increased by running ADC's in parallel.

To do this requres one to first compute the signal,

s_k(t) = [exp(I*k*O*t)*s(t)] ** [O/sqrt(2*Pi)*exp(I*(a +
O/2)*t)*sinc(O/2*t)]

where ** means convolution and [a,O] represents the interval of the
bandwidth of the ADC. (a represents the lowest frequency and O the highest)

So one would take k = 0 and pass it to one ADC, k = 1 to another, etc and
then to get the original signal back one just as to compute in the
digital
domain,

s(t) = sum(exp(-I*k*O*t)*s_k(t),k=-oo..oo).

Thats basically it. The theory is very simple.

The hard part come with implementing it. First off, the circuitry that
actually computes the convolution and does the multiplication would

have
to

have enough bandwidth not to destory the signal and the time delay would
have to be taken into account. Theres also the issue with generating the
sin and cos waves to use in the exp() factors along with the sinc function.

the formula for s_k(t) does not involve information about s(t) except

at
the

point t so it is causal.

Certain approximations will, ofcourse, come into play like having to
restrict the convolution to a finite range(which will in effect make the
filtering non-ideal...which might be able to be taken care of after
conversion).


All this rests on how hard it is to implement the operational circuitry
to
do the "shifting". Mathematically its easily provable that it works but
implementing the necessarily mathematical operations might be impossible
with circuits or might not be practical enough. (although I'm still
varifying the mathematics and making sure some things are correct)

If one can create a operational circuit that can do the above equation
for
s_k(t) that can "out perform" the ADC(i.e., that it can compute s_k(t) that
will be good enough for the ADC). Then maybe we can try to impelement

it
and

see how well it works.

Overall it might be easier just to make a better ADC than the method I'm
proposing but thats why I'm asking since I don't have much experience
with
implementing analog mathematics.

Jon

Wel, you could digitize the signal first, do the calculations in the
digital
domain, convert it back to analog and then digitize it following your
scheme
;o)

heh, yeah... that would work!

Seriously, Nyquist states that the sample rate should be at least twice
the
signal's _bandwidth_ (which is equivalent to saying "highest frequency" if
you start at DC). This means that you can undersample bandlimited signals
that do not go down too much, i.e. if there is empty space in the spectrum
where the alised signal can go without interfering with anything. In many
applications where high frequency signals have to be sampled these signals
do not go down to DC. If they do, cut up your signal (DC to f_max) in two
or
more parts with (band-pass) filters and (under)sample their outputs. Apply
correction to taste in the digital domain.

I think this is effectively similar to what I'm talking about but not
formulated in a precise mathematical model. (Although it might be exactly
equivilent to what I am doing).

I don't know much about undersampling but I don't see how you could recover
higher frequencies. If the ADC has a bandwidth of O then you are completely
screwed no matter how you sample if your signal has a higher bandwidth(here
the bandwidth of the ADC means the largest bandwidth it can sample
properly).

In effect though I think your undersampling is basically what I'm doing but
in the time domain by multiplying by the shift factor (exp(I*a*t)*s(t)

hat(s)(w - a)).

I think what you are talking about is pretty much exactly what I'm doing
though except I didn't realize that you could undersample a bandlimited
signal yet recover the actual signal. The difference here is that your
signal has to have "room" in the bandwidth to do this while my method
doesn't rely on it(but basically same principle).

You need room to shift spectra around no matter how you do it. Without room
you will get interference and aliasing. If you shift a low-pass spectrum
down you will get problems with the low frequencies that fold back, i.e.
aliasing.

i.e. If, say, we have a signal that has a bandwidth between [a, a + 0] (0
here is omega and not 0... maybe not a good choice) then if a = 0 and we
sample the signal with an ADC that has bandwidth [zero, Omega] we can
recover the original signal by digitally shifting the frequency domain by
omega. I think this is what you are talking about and is basically what i'm
doing except I'm shifting the original signal's frequency domain too instead
of leaving it fixed.

Undersampling a band-pass signal effectively shifts its spectrum down. But
you don't need fancy math to do it, just slowing down the clock.

--DF

 

[[email protected]]

If one can create a operational circuit that can do the above equation for

s_k(t) that can "out perform" the ADC(i.e., that it can compute s_k(t) that
will be good enough for the ADC). Then maybe we can try to impelement it and
see how well it works.

For calculation speed use an fpga.
(or dsp?)

Overall it might be easier just to make a better ADC than the method I'm
proposing but thats why I'm asking since I don't have much experience with
implementing analog mathematics.

National have a 3 Gsps chip (which uses two A/D in parallell).

 

[Ancient_Hacker]

The idea is to use the fact that a shift in the frequency domain is
equivilent to multiplying by exp(+-I*a*t) in the time domain.

There's no free lunch. While your method might shift the frequencies,
that's a BAD thing, as it will break all the phase relationships. Plus
your high frequencies will get added to any low frequencies in the
signal. And you'll get massive multi-pass aliasing.

 

[Mike Monett]

I was thinking the other day about how to increase the usage of an ADC
and I came up with this idea. It is mathematically solid but I have no
idea if it is practical.

The idea is to use the fact that a shift in the frequency domain is
equivilent to multiplying by exp(+-I*a*t) in the time domain.

So by using that property we can shift the higher frequencies of the
function into a lower region that can be handled by the ADC. Sampling
rate can be increased by running ADC's in parallel.

Looks like a good idea. You might be interested in the following
notes on Digital Bandwidth Interleaving by Lecroy:

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[Abstract Dissonance]

There's no free lunch. While your method might shift the frequencies,
that's a BAD thing, as it will break all the phase relationships. Plus
your high frequencies will get added to any low frequencies in the
signal. And you'll get massive multi-pass aliasing.

Thats not true. There is no theoretical phase change. If there was then I
could not get the original function out of the mathematics... but yet I do.

Now there might be phase distortion due to the implementation though... but
thats why I asked. If you cared to look at the pdf you would see the
equations and would see how simple it is. BTW shifting frequencies do not
change the phase relationship as it is constant. Also note that all filter
produces some type of phase distortion so even though it might be a bad
thing it happens all the time.

i.e.

given a function f(t), it has a fourier transform F(w) =
1/sqrt(2*Pi)*int(f(t)*exp(-I*w*t),t=-oo..oo).

Now F(w) is, in general, a complex valued function... so

F(w) = |F(w)|*exp(I*arg(F(w))

Now you are saying there is a phase change so one would have

G(w) = |F(w)|*exp(I*(arg(F(w)) + h(w)) = F(w)*exp(I*h(w))

but taking the inverse fourier transform of gives

g(t) = 1/sqrt(2*Pi)*int(F(w)*exp(I*(w*t + h(w))),w=-infinity..infinity)

Surely if h(w) is not 0 then one cannot get g(t) = f(t).. and if there is
such an h(w) then it doesn't matter because you get the exact same time
dependent function... (which pretty much means that they must have the same
phase relationships to ==> h(w) = 0).



So, the point being is that there is no phase change or it would have poped
out because the methods are basically what is happenin above.

Actually, if you care to look at the pdf you will see that there is a phase
change when going into the ADC... just like you said, yet it gets cancelled
end the end.

So, sure, there is a phase change but it is only a temporary one. Now this
might have some practical significance in reducing the quality but
mathematically it is not important.

i.e., since the process is an approximation there might be significant
degredation of the signal to make it impractical.

 

[Abstract Dissonance]

Looks like a good idea. You might be interested in the following
notes on Digital Bandwidth Interleaving by Lecroy:

Thanks. I was interested in this at first as that was the most logical thing
to do. I asked about it here before but a lot of people said it wasn't that
good of an idea because its hard to implement.... I'll check it out though.
Might learn something

(Although it would be nice to know how practical my method is too

Thanks again,
Jon

 

[Abstract Dissonance]

For calculation speed use an fpga.
(or dsp?)

?

I'm not sure what you mean but if you are saying to use something like that
to do the circuitry I'm talking about then I think it probably won't work.
These devices are bandlimited too and are digital? So you might as well
just try and make a faster ADC?


i.e., it would be useless to compute the convolution digitally because you
have to go through and ADC in the first place... (although maybe a mixture
of analog and digital can work)

National have a 3 Gsps chip (which uses two A/D in parallell).

wow. thats a lot. But I bet its hard to use?

What my method is suppose to let you do, theoretically(if no flaws), is let
you use any ADC's for *any* signal by creating a standarized front end to
condition the signal. Theres a trade off of speed vs bandwidth though yet
these could be solved by using more ADC's.

 

[Abstract Dissonance]

Looks like a good idea. You might be interested in the following
notes on Digital Bandwidth Interleaving by Lecroy:

Oh, and I guess basically my method would require running ADC's in parallel
which is somewhat similar to the interleaving. It might not be as effective
as that though... because instead of dealing with the clock issue you have
to worry about the delay of the frequency shifting circuitry. But my method
would require much more complicated circuitry along with many more potential
things that would introduce inaccuracies.

 

[Ancient_Hacker]

Okay, my phase intuition was wrong.

But I still think you're getting something for nothing, which is
usually wrong.

How can a signal of 1/10th the bandwidth carry the same information?

You're giving up something, perhaps signal to noise ratio.

Does the slower ADC need X times the amplitude resolution? If so, you
havent gained anything. Adding resolution to an A/D is harder than
adding speed. Speed you can easily get with multiple A/D's and delay
lines, that's a no-brainer.

And of course there's the chicken-egg problem-- to do the math requires
the high speed signal in digital format, which is what you're trying to
avoid. Ouch.

 

[John Larkin]

Thanks. I was interested in this at first as that was the most logical thing
to do. I asked about it here before but a lot of people said it wasn't that
good of an idea because its hard to implement.... I'll check it out though.
Might learn something

Of course it's hard to implement. That's why the LeCroy scope costs
$150K or something like that.

John

 

[Robert Latest]

On 13 Jul 2006 06:39:22 -0700,

But I still think you're getting something for nothing, which is
usually wrong.

How can a signal of 1/10th the bandwidth carry the same information?

I think he wanted to use several slow ADCs.

robert

 

[Bo]

Of course it's hard to implement. That's why the LeCroy scope costs
$150K or something like that.

John

Right. But what I don't get is why:

Lecroy has a 100GHz bandwidth scope that only samples at 1GHz. And then they
have a 1GHz bandwidth scope that samples at 10 GSa/s.

Why the disparity? Why not have the ultra high sample rates on the wide
analog bandwidth unit?

I need to direct sample an X band radar signal (ie 10 GHz)-- but find that
ADCs with analog bandwidths are only available to 3GHz. How to overcome the
analog bandwidth limitations of the ADC? You can overcome the sampling
rates by parallel conversions on phase-shifted clocks. But what is the
work-around for _analog_ bandwidth limitations???

Bo

 

[John Larkin]

Right. But what I don't get is why:

Lecroy has a 100GHz bandwidth scope that only samples at 1GHz. And then they
have a 1GHz bandwidth scope that samples at 10 GSa/s.

The first is an equivalent-time sampler [1] that takes only one sample
each repetition of the signal, ie one sample per trigger, and
reconstructs the waveform. The second has a really fast ADC and
memory, and can acquire a full waveform from a single trigger.

Why the disparity? Why not have the ultra high sample rates on the wide
analog bandwidth unit?

I need to direct sample an X band radar signal (ie 10 GHz)-- but find that
ADCs with analog bandwidths are only available to 3GHz. How to overcome the
analog bandwidth limitations of the ADC?

An equivalent-time sampler has a fast diode-based sample-and-hold
ahead of a very slow ADC.

John

[1] like this one, 12 GHz analog bandwidth...

http://cgi.ebay.com/ws/eBayISAPI.dl...60004297114&rd=1&sspagename=STRK:MEWN:IT&rd=1

 

[John Larkin]

Oh, and I guess basically my method would require running ADC's in parallel
which is somewhat similar to the interleaving. It might not be as effective
as that though... because instead of dealing with the clock issue you have
to worry about the delay of the frequency shifting circuitry. But my method
would require much more complicated circuitry along with many more potential
things that would introduce inaccuracies.

When Tek designed the 7104 1 GHz analog scope, they considered
splitting up the input into frequency bands, amplifying each, and
recombinimg at the CRT. They opted for brute-force silicon plus other
tricks, in the end. The story is in one of Jim Williams' books.

John

 

[Joel Kolstad]

When Tek designed the 7104 1 GHz analog scope, they considered
splitting up the input into frequency bands, amplifying each, and
recombinimg at the CRT.

Splitting up and recombining bands sounds like something of a nightmare... I
suppose that with the rather limited resolution of a 'scope it might work OK,
but at least personally brute-force approach seems like a *much* better
solution in terms of lowering technical risk.

 

[Abstract Dissonance]

Okay, my phase intuition was wrong.

But I still think you're getting something for nothing, which is
usually wrong.

How can a signal of 1/10th the bandwidth carry the same information?

No, it doesn't. You are splitting up one signal into several... each
"subsignal" carries part of the bandwidth. The first carries the low
frequencies, the second carries higher frequencies, etc... It would be just
like filtering a signal into "bands"... but then all those signals are
"mapped" into the same frequency range that can be handled by the ADC(s).

You're giving up something, perhaps signal to noise ratio.

Nope. Ideally you are not giving up anything. Its very simple. For all
practical purposes though it migh not be worth it because you have to
approximate some things(such as using a finite convolution and finite
kernel).

Does the slower ADC need X times the amplitude resolution? If so, you
havent gained anything. Adding resolution to an A/D is harder than
adding speed. Speed you can easily get with multiple A/D's and delay
lines, that's a no-brainer.

No, its resolution independent.

And of course there's the chicken-egg problem-- to do the math requires
the high speed signal in digital format, which is what you're trying to
avoid. Ouch.

huh? The math doesn't require any thing from electronics. Mathematically it
works perfectly and is based on a very simple concept(and is similar to the
basics of wavelet theory using haar wavelets).