JFET Common Source DC Amplifier Temperature Compensation

[D from BC]

My app uses a JFET..

What are some ways to temperature compensate a common source JFET DC
amplifier.

Vdd=5V
|
10K
|
+------------Vout (biased for 50% Vdd)
|d
signal--->[ N JFET
|s
|
Gnd

'DC' amplifier.

Details:
1) The signal does contain a stable bias voltage.
2) Temp range: 20C to 50C
3) Vout thermal error of +/-10mVdc.
4) BW: DC to 2Mhz

I'm guessing compensation by:
1) PTC or NTC resistor
2) Use another JFET and feed in anti drift.
3) Find a special jfet (IC??) << not an op amp!

Possible ??


D from BC

 

[Jim Thompson]

My app uses a JFET..

What are some ways to temperature compensate a common source JFET DC
amplifier.

Vdd=5V
|
10K
|
+------------Vout (biased for 50% Vdd)
|d
signal--->[ N JFET
|s
|
Gnd

'DC' amplifier.

Details:
1) The signal does contain a stable bias voltage.
2) Temp range: 20C to 50C
3) Vout thermal error of +/-10mVdc.
4) BW: DC to 2Mhz

I'm guessing compensation by:
1) PTC or NTC resistor
2) Use another JFET and feed in anti drift.
3) Find a special jfet (IC??) << not an op amp!

Possible ??


D from BC

What does "temperature compensate" mean? Bias point, gain, both?

...Jim Thompson

 

[D from BC]

My app uses a JFET..

What are some ways to temperature compensate a common source JFET DC
amplifier.

Vdd=5V
|
10K
|
+------------Vout (biased for 50% Vdd)
|d
signal--->[ N JFET
|s
|
Gnd

'DC' amplifier.

Details:
1) The signal does contain a stable bias voltage.
2) Temp range: 20C to 50C
3) Vout thermal error of +/-10mVdc.
4) BW: DC to 2Mhz

I'm guessing compensation by:
1) PTC or NTC resistor
2) Use another JFET and feed in anti drift.
3) Find a special jfet (IC??) << not an op amp!

Possible ??


D from BC

What does "temperature compensate" mean? Bias point, gain, both?

...Jim Thompson

Let's say the gate voltage is set for Vout = 2.5V...
Vout can vary with temperature..Especially with no JFET source
resistor.

For a DC amplifier like this, doesn't DC bias thermal drift at the
output also look like DC gain thermal drift?

IIRC the power supply drifting with temperature can cause bias drift
alone.


D from BC

 

[Joerg]

My app uses a JFET..

What are some ways to temperature compensate a common source JFET DC
amplifier.

Vdd=5V
|
10K
|
+------------Vout (biased for 50% Vdd)
|d
signal--->[ N JFET
|s
|
Gnd

'DC' amplifier.

Details:
1) The signal does contain a stable bias voltage.
2) Temp range: 20C to 50C
3) Vout thermal error of +/-10mVdc.
4) BW: DC to 2Mhz

I'm guessing compensation by:
1) PTC or NTC resistor
2) Use another JFET and feed in anti drift.

That would be my avenue. There are duals such as this one, pretty low noise:
http://www.semicon.toshiba.co.jp/docs/datasheet/en/Transistor/2SK3320_en_datasheet_071101.pdf

Buying those might be a challenge though.

 

[Jim Thompson]

My app uses a JFET..

What are some ways to temperature compensate a common source JFET DC
amplifier.

Vdd=5V
|
10K
|
+------------Vout (biased for 50% Vdd)
|d
signal--->[ N JFET
|s
|
Gnd

'DC' amplifier.

Details:
1) The signal does contain a stable bias voltage.
2) Temp range: 20C to 50C
3) Vout thermal error of +/-10mVdc.
4) BW: DC to 2Mhz

I'm guessing compensation by:
1) PTC or NTC resistor
2) Use another JFET and feed in anti drift.
3) Find a special jfet (IC??) << not an op amp!

Possible ??


D from BC

What does "temperature compensate" mean? Bias point, gain, both?

...Jim Thompson

Let's say the gate voltage is set for Vout = 2.5V...
Vout can vary with temperature..Especially with no JFET source
resistor.

For a DC amplifier like this, doesn't DC bias thermal drift at the
output also look like DC gain thermal drift?

IIRC the power supply drifting with temperature can cause bias drift
alone.


D from BC

Except for the "sweet spot" bias condition, gain (small signal) and
output Q-point probably vary independently.

Instead of your vague "specification" what is it you are trying to
accomplish?

...Jim Thompson

 

[Tim Williams]

Isn't the slick solution (given in AoE) to put another one in the source,
so source current (and thus Vgs) is always equal between the two?

Hmm...but that's for a source follower. Constant source current doesn't do
you much good. Well, it would work for setting DC bias nonetheless, with
the source bypassed to ground. Doesn't do anything for transconductance.

Tim

 

[D from BC]

On Mon, 19 Nov 2007 14:01:55 -0800, D from BC

My app uses a JFET..

What are some ways to temperature compensate a common source JFET DC
amplifier.

Vdd=5V
|
10K
|
+------------Vout (biased for 50% Vdd)
|d
signal--->[ N JFET
|s
|
Gnd

'DC' amplifier.

Details:
1) The signal does contain a stable bias voltage.
2) Temp range: 20C to 50C
3) Vout thermal error of +/-10mVdc.
4) BW: DC to 2Mhz

I'm guessing compensation by:
1) PTC or NTC resistor
2) Use another JFET and feed in anti drift.
3) Find a special jfet (IC??) << not an op amp!

Possible ??


D from BC

What does "temperature compensate" mean? Bias point, gain, both?

...Jim Thompson

Let's say the gate voltage is set for Vout = 2.5V...
Vout can vary with temperature..Especially with no JFET source
resistor.

For a DC amplifier like this, doesn't DC bias thermal drift at the
output also look like DC gain thermal drift?

IIRC the power supply drifting with temperature can cause bias drift
alone.


D from BC

Except for the "sweet spot" bias condition, gain (small signal) and
output Q-point probably vary independently.

Instead of your vague "specification" what is it you are trying to
accomplish?

...Jim Thompson

Ahhh... I think you've caught on that I dumb down problems to the
point of making it the wrong problem

Gee...I dunno if I can devague it more...
I'll try...
I need a fast DC amplifier with an input range of 0 to
-200mV(negative) with a response up to 2Mhz.
The output of the amplifier has to reach 2.5V out for -200mV in.
There is no negative supply present.

I thought a JFET would be best..but spoiled by thermal drift.....
My alternatives were:
Use resistive network + op amp
Create a negative supply + op amp
Put one of those 'beyond the rails' op amps to the test.
Negative rail IC + op amp


D from BC

 

[Fred Bartoli]

Jim Thompson a écrit :

On Mon, 19 Nov 2007 14:01:55 -0800, D from BC

My app uses a JFET..

What are some ways to temperature compensate a common source JFET DC
amplifier.

Vdd=5V
|
10K
|
+------------Vout (biased for 50% Vdd)
|d
signal--->[ N JFET
|s
|
Gnd

'DC' amplifier.

Details:
1) The signal does contain a stable bias voltage.
2) Temp range: 20C to 50C
3) Vout thermal error of +/-10mVdc.
4) BW: DC to 2Mhz

I'm guessing compensation by:
1) PTC or NTC resistor
2) Use another JFET and feed in anti drift.
3) Find a special jfet (IC??) << not an op amp!

Possible ??


D from BC
What does "temperature compensate" mean? Bias point, gain, both?

...Jim Thompson

Let's say the gate voltage is set for Vout = 2.5V...
Vout can vary with temperature..Especially with no JFET source
resistor.

For a DC amplifier like this, doesn't DC bias thermal drift at the
output also look like DC gain thermal drift?

IIRC the power supply drifting with temperature can cause bias drift
alone.


D from BC

Except for the "sweet spot" bias condition, gain (small signal) and
output Q-point probably vary independently.

Are you sure that they are independent?
For a given jfet model gm is strongly linked to the drain current (and
essentially free from IDSS).

 

[Jim Thompson]

On Mon, 19 Nov 2007 15:25:09 -0700, Jim Thompson

On Mon, 19 Nov 2007 14:01:55 -0800, D from BC

My app uses a JFET..

What are some ways to temperature compensate a common source JFET DC
amplifier.

Vdd=5V
|
10K
|
+------------Vout (biased for 50% Vdd)
|d
signal--->[ N JFET
|s
|
Gnd

'DC' amplifier.

Details:
1) The signal does contain a stable bias voltage.
2) Temp range: 20C to 50C
3) Vout thermal error of +/-10mVdc.
4) BW: DC to 2Mhz

I'm guessing compensation by:
1) PTC or NTC resistor
2) Use another JFET and feed in anti drift.
3) Find a special jfet (IC??) << not an op amp!

Possible ??


D from BC

What does "temperature compensate" mean? Bias point, gain, both?

...Jim Thompson

Let's say the gate voltage is set for Vout = 2.5V...
Vout can vary with temperature..Especially with no JFET source
resistor.

For a DC amplifier like this, doesn't DC bias thermal drift at the
output also look like DC gain thermal drift?

IIRC the power supply drifting with temperature can cause bias drift
alone.


D from BC

Except for the "sweet spot" bias condition, gain (small signal) and
output Q-point probably vary independently.

Instead of your vague "specification" what is it you are trying to
accomplish?

...Jim Thompson

Ahhh... I think you've caught on that I dumb down problems to the
point of making it the wrong problem

Gee...I dunno if I can devague it more...
I'll try...
I need a fast DC amplifier with an input range of 0 to
-200mV(negative) with a response up to 2Mhz.
The output of the amplifier has to reach 2.5V out for -200mV in.
There is no negative supply present.

I thought a JFET would be best..but spoiled by thermal drift.....
My alternatives were:
Use resistive network + op amp
Create a negative supply + op amp
Put one of those 'beyond the rails' op amps to the test.
Negative rail IC + op amp


D from BC

If -200mV Input => +2.5V Output, what does 0V Input => ?? Output

...Jim Thompson

 

[Jim Thompson]

Jim Thompson a écrit :

On Mon, 19 Nov 2007 15:14:30 -0800, D from BC
[snip]

Except for the "sweet spot" bias condition, gain (small signal) and
output Q-point probably vary independently.

Are you sure that they are independent?
For a given jfet model gm is strongly linked to the drain current (and
essentially free from IDSS).

They're not "independent", but I don't think incremental gain and bias
Q-point will exactly track.

...Jim Thompson

 

[Fred Bartoli]

Jim Thompson a écrit :

Jim Thompson a écrit :

On Mon, 19 Nov 2007 15:14:30 -0800, D from BC
[snip]
Except for the "sweet spot" bias condition, gain (small signal) and
output Q-point probably vary independently.

Are you sure that they are independent?
For a given jfet model gm is strongly linked to the drain current (and
essentially free from IDSS).

They're not "independent", but I don't think incremental gain and bias
Q-point will exactly track.

Ah, a bit of french meaning slept in there.

Now you said they'd probably vary independently, which they don't (for
ex. http://www.alldatasheet.com/view.jsp?Searchword=2SK170 ).

But gain and bias point sure can't exactly track. For this to be so,
you'd have to have gm proportional to Id, which you can't ignore to be
the hallmark of exponential

 

[Joerg]

On Mon, 19 Nov 2007 15:25:09 -0700, Jim Thompson

On Mon, 19 Nov 2007 14:01:55 -0800, D from BC

My app uses a JFET..

What are some ways to temperature compensate a common source JFET DC
amplifier.

Vdd=5V
|
10K
|
+------------Vout (biased for 50% Vdd)
|d
signal--->[ N JFET
|s
|
Gnd

'DC' amplifier.

Details:
1) The signal does contain a stable bias voltage.
2) Temp range: 20C to 50C
3) Vout thermal error of +/-10mVdc.
4) BW: DC to 2Mhz

I'm guessing compensation by:
1) PTC or NTC resistor
2) Use another JFET and feed in anti drift.
3) Find a special jfet (IC??) << not an op amp!

Possible ??


D from BC
What does "temperature compensate" mean? Bias point, gain, both?

...Jim Thompson
Let's say the gate voltage is set for Vout = 2.5V...
Vout can vary with temperature..Especially with no JFET source
resistor.

For a DC amplifier like this, doesn't DC bias thermal drift at the
output also look like DC gain thermal drift?

IIRC the power supply drifting with temperature can cause bias drift
alone.


D from BC

Except for the "sweet spot" bias condition, gain (small signal) and
output Q-point probably vary independently.

Instead of your vague "specification" what is it you are trying to
accomplish?

...Jim Thompson

Ahhh... I think you've caught on that I dumb down problems to the
point of making it the wrong problem

Gee...I dunno if I can devague it more...
I'll try...
I need a fast DC amplifier with an input range of 0 to
-200mV(negative) with a response up to 2Mhz.
The output of the amplifier has to reach 2.5V out for -200mV in.
There is no negative supply present.

I thought a JFET would be best..but spoiled by thermal drift.....
My alternatives were:
Use resistive network + op amp
Create a negative supply + op amp
Put one of those 'beyond the rails' op amps to the test.

Many regular opamps can work down to about 300mV below the negative rail
but you'd have to find one that's fast enough and low enough in offset.

Negative rail IC + op amp

If you have a spare inverter somewhere you could make in inverting switcher.

 

[D from BC]

On Mon, 19 Nov 2007 15:14:30 -0800, D from BC

On Mon, 19 Nov 2007 15:25:09 -0700, Jim Thompson

On Mon, 19 Nov 2007 14:01:55 -0800, D from BC

My app uses a JFET..

What are some ways to temperature compensate a common source JFET DC
amplifier.

Vdd=5V
|
10K
|
+------------Vout (biased for 50% Vdd)
|d
signal--->[ N JFET
|s
|
Gnd

'DC' amplifier.

Details:
1) The signal does contain a stable bias voltage.
2) Temp range: 20C to 50C
3) Vout thermal error of +/-10mVdc.
4) BW: DC to 2Mhz

I'm guessing compensation by:
1) PTC or NTC resistor
2) Use another JFET and feed in anti drift.
3) Find a special jfet (IC??) << not an op amp!

Possible ??


D from BC

What does "temperature compensate" mean? Bias point, gain, both?

...Jim Thompson

Let's say the gate voltage is set for Vout = 2.5V...
Vout can vary with temperature..Especially with no JFET source
resistor.

For a DC amplifier like this, doesn't DC bias thermal drift at the
output also look like DC gain thermal drift?

IIRC the power supply drifting with temperature can cause bias drift
alone.


D from BC

Except for the "sweet spot" bias condition, gain (small signal) and
output Q-point probably vary independently.

Instead of your vague "specification" what is it you are trying to
accomplish?

...Jim Thompson

Ahhh... I think you've caught on that I dumb down problems to the
point of making it the wrong problem

Gee...I dunno if I can devague it more...
I'll try...
I need a fast DC amplifier with an input range of 0 to
-200mV(negative) with a response up to 2Mhz.
The output of the amplifier has to reach 2.5V out for -200mV in.
There is no negative supply present.

I thought a JFET would be best..but spoiled by thermal drift.....
My alternatives were:
Use resistive network + op amp
Create a negative supply + op amp
Put one of those 'beyond the rails' op amps to the test.
Negative rail IC + op amp


D from BC

If -200mV Input => +2.5V Output, what does 0V Input => ?? Output

...Jim Thompson

It's allowed to clip..


After some thought ..and to answer your question earlier..
I'd say I'm looking for bias point thermal compensation.
Not small signal gain thermal compensation.

I believe it'll be ok for the thermal compensation to move the Q point
in order to maintain Vout at the bias level of 2.5V.
The Vout bias level is not to drift with temperature.
The new Q point due to thermal compensation and the resulting new
small signal Av.... is probably ok.

For my app..
The Avdc thermal stability (at only one Q point) is more important
than the small signal Avac thermal stability..


D from BC

 

[John Larkin]

Put one of those 'beyond the rails' op amps to the test.

The r-r opamps do work. Sounds like a lot less hassle than trying to
work around a discrete jfet.

John

 

[Jim Thompson]

On Mon, 19 Nov 2007 16:27:11 -0700, Jim Thompson

On Mon, 19 Nov 2007 15:14:30 -0800, D from BC

On Mon, 19 Nov 2007 15:25:09 -0700, Jim Thompson

On Mon, 19 Nov 2007 14:01:55 -0800, D from BC

My app uses a JFET..

What are some ways to temperature compensate a common source JFET DC
amplifier.

Vdd=5V
|
10K
|
+------------Vout (biased for 50% Vdd)
|d
signal--->[ N JFET
|s
|
Gnd

'DC' amplifier.

Details:
1) The signal does contain a stable bias voltage.
2) Temp range: 20C to 50C
3) Vout thermal error of +/-10mVdc.
4) BW: DC to 2Mhz

I'm guessing compensation by:
1) PTC or NTC resistor
2) Use another JFET and feed in anti drift.
3) Find a special jfet (IC??) << not an op amp!

Possible ??


D from BC

What does "temperature compensate" mean? Bias point, gain, both?

...Jim Thompson

Let's say the gate voltage is set for Vout = 2.5V...
Vout can vary with temperature..Especially with no JFET source
resistor.

For a DC amplifier like this, doesn't DC bias thermal drift at the
output also look like DC gain thermal drift?

IIRC the power supply drifting with temperature can cause bias drift
alone.


D from BC

Except for the "sweet spot" bias condition, gain (small signal) and
output Q-point probably vary independently.

Instead of your vague "specification" what is it you are trying to
accomplish?

...Jim Thompson

Ahhh... I think you've caught on that I dumb down problems to the
point of making it the wrong problem

Gee...I dunno if I can devague it more...
I'll try...
I need a fast DC amplifier with an input range of 0 to
-200mV(negative) with a response up to 2Mhz.
The output of the amplifier has to reach 2.5V out for -200mV in.
There is no negative supply present.

I thought a JFET would be best..but spoiled by thermal drift.....
My alternatives were:
Use resistive network + op amp
Create a negative supply + op amp
Put one of those 'beyond the rails' op amps to the test.
Negative rail IC + op amp


D from BC

If -200mV Input => +2.5V Output, what does 0V Input => ?? Output

...Jim Thompson

It's allowed to clip..


After some thought ..and to answer your question earlier..
I'd say I'm looking for bias point thermal compensation.
Not small signal gain thermal compensation.

I believe it'll be ok for the thermal compensation to move the Q point
in order to maintain Vout at the bias level of 2.5V.
The Vout bias level is not to drift with temperature.
The new Q point due to thermal compensation and the resulting new
small signal Av.... is probably ok.

For my app..
The Avdc thermal stability (at only one Q point) is more important
than the small signal Avac thermal stability..


D from BC

Is this part of your "alternating noisy edges" problem?

Seems you're requesting assistance at too small a scale... a larger
over-view might produce a more elegant solution when we can see loads
and continuing functions ;-)

...Jim Thompson

 

[D from BC]

My app uses a JFET..

What are some ways to temperature compensate a common source JFET DC
amplifier.

Vdd=5V
|
10K
|
+------------Vout (biased for 50% Vdd)
|d
signal--->[ N JFET
|s
|
Gnd

'DC' amplifier.

Details:
1) The signal does contain a stable bias voltage.
2) Temp range: 20C to 50C
3) Vout thermal error of +/-10mVdc.
4) BW: DC to 2Mhz

I'm guessing compensation by:
1) PTC or NTC resistor
2) Use another JFET and feed in anti drift.

That would be my avenue. There are duals such as this one, pretty low noise:
http://www.semicon.toshiba.co.jp/docs/datasheet/en/Transistor/2SK3320_en_datasheet_071101.pdf

Buying those might be a challenge though.

3) Find a special jfet (IC??) << not an op amp!

Possible ??

Bummer... No app note at the bottom..

I get suspicious when parts are hard to get...It usually means I'm
doing something the wrong way..or old way..
On occasion, it can be it being a very new way..but I don't think so
in this case..


D from BC

 

[Joerg]

The r-r opamps do work. Sounds like a lot less hassle than trying to
work around a discrete jfet.

Looks like he doesn't even need output RR. Isn't there a LM324 on
steroids somewhere?

 

[D from BC]

On Mon, 19 Nov 2007 16:16:56 -0800, D from BC

On Mon, 19 Nov 2007 16:27:11 -0700, Jim Thompson

On Mon, 19 Nov 2007 15:14:30 -0800, D from BC

On Mon, 19 Nov 2007 15:25:09 -0700, Jim Thompson

On Mon, 19 Nov 2007 14:01:55 -0800, D from BC

My app uses a JFET..

What are some ways to temperature compensate a common source JFET DC
amplifier.

Vdd=5V
|
10K
|
+------------Vout (biased for 50% Vdd)
|d
signal--->[ N JFET
|s
|
Gnd

'DC' amplifier.

Details:
1) The signal does contain a stable bias voltage.
2) Temp range: 20C to 50C
3) Vout thermal error of +/-10mVdc.
4) BW: DC to 2Mhz

I'm guessing compensation by:
1) PTC or NTC resistor
2) Use another JFET and feed in anti drift.
3) Find a special jfet (IC??) << not an op amp!

Possible ??


D from BC

What does "temperature compensate" mean? Bias point, gain, both?

...Jim Thompson

Let's say the gate voltage is set for Vout = 2.5V...
Vout can vary with temperature..Especially with no JFET source
resistor.

For a DC amplifier like this, doesn't DC bias thermal drift at the
output also look like DC gain thermal drift?

IIRC the power supply drifting with temperature can cause bias drift
alone.


D from BC

Except for the "sweet spot" bias condition, gain (small signal) and
output Q-point probably vary independently.

Instead of your vague "specification" what is it you are trying to
accomplish?

...Jim Thompson

Ahhh... I think you've caught on that I dumb down problems to the
point of making it the wrong problem

Gee...I dunno if I can devague it more...
I'll try...
I need a fast DC amplifier with an input range of 0 to
-200mV(negative) with a response up to 2Mhz.
The output of the amplifier has to reach 2.5V out for -200mV in.
There is no negative supply present.

I thought a JFET would be best..but spoiled by thermal drift.....
My alternatives were:
Use resistive network + op amp
Create a negative supply + op amp
Put one of those 'beyond the rails' op amps to the test.
Negative rail IC + op amp


D from BC

If -200mV Input => +2.5V Output, what does 0V Input => ?? Output

...Jim Thompson

It's allowed to clip..


After some thought ..and to answer your question earlier..
I'd say I'm looking for bias point thermal compensation.
Not small signal gain thermal compensation.

I believe it'll be ok for the thermal compensation to move the Q point
in order to maintain Vout at the bias level of 2.5V.
The Vout bias level is not to drift with temperature.
The new Q point due to thermal compensation and the resulting new
small signal Av.... is probably ok.

For my app..
The Avdc thermal stability (at only one Q point) is more important
than the small signal Avac thermal stability..


D from BC

Is this part of your "alternating noisy edges" problem?

Seems you're requesting assistance at too small a scale... a larger
over-view might produce a more elegant solution when we can see loads
and continuing functions ;-)

...Jim Thompson

Good guess!

I know what your saying..
It's like Dr. Frankenstein putting bits and pieces of people together
to make Frankenstein..
IIRC Frankenstein wasn't an elegant solution..

I'm just chicken to post my whole project. Also, there's the pride
factor too..
And...I'm trying to have a mostly original project..

So... it might wander around like a zombie and scare people...I made
it and it works...well kinda..


D from BC

 

[Winfield]

Jim Thompson a écrit :

Fred Bartoli >

Jim Thompson a écrit :
D from BC wrote:

[snip]
Except for the "sweet spot" bias condition, gain (small signal)
and output Q-point probably vary independently.
Are you sure that they are independent?
For a given jfet model gm is strongly linked to the drain current
(and essentially free from IDSS).

They're not "independent", but I don't think incremental gain
and bias Q-point will exactly track.

Ah, a bit of french meaning slept in there.

Now you said they'd probably vary independently, which they don't
(for ex.http://www.alldatasheet.com/view.jsp?Searchword=2SK170).

But gain and bias point sure can't exactly track. For this to be
so, you'd have to have gm proportional to Id, which you can't
ignore to be the hallmark of exponential

Well, as I understand it, and based on my measurements as well,
gm does mostly track Id, more or less independent of Idss,
especially at currents well below Idss. But I don't get the Q
discussion y'all are having here. To my mind the Id operating
point is best set independently from the particular miserable
JFET's Vgs vs. Id, etc. I mean, part-to-part, sheesh! Bummer!

But anyway, whatever, I suggest that D just go ahead and use a
JFET opamp. I mean, I'm a "big" fan of JFETs and use them as I
can, for when they're best, but what an unholy pain they are!

 

[Phil Hobbs]

On Mon, 19 Nov 2007 15:14:30 -0800, D from BC

On Mon, 19 Nov 2007 15:25:09 -0700, Jim Thompson

On Mon, 19 Nov 2007 14:01:55 -0800, D from BC

My app uses a JFET..
What are some ways to temperature compensate a common source JFET DC
amplifier.

Vdd=5V
|
10K
|
+------------Vout (biased for 50% Vdd)
|d
signal--->[ N JFET |s
|
Gnd

'DC' amplifier.
Details: 1) The signal does contain a stable bias voltage.
2) Temp range: 20C to 50C 3) Vout thermal error of +/-10mVdc.
4) BW: DC to 2Mhz

I'm guessing compensation by:
1) PTC or NTC resistor
2) Use another JFET and feed in anti drift.
3) Find a special jfet (IC??) << not an op amp!

Possible ??


D from BC
What does "temperature compensate" mean? Bias point, gain, both?

...Jim Thompson
Let's say the gate voltage is set for Vout = 2.5V...
Vout can vary with temperature..Especially with no JFET source
resistor.

For a DC amplifier like this, doesn't DC bias thermal drift at the
output also look like DC gain thermal drift?

IIRC the power supply drifting with temperature can cause bias drift
alone.


D from BC
Except for the "sweet spot" bias condition, gain (small signal) and
output Q-point probably vary independently.

Instead of your vague "specification" what is it you are trying to
accomplish?

...Jim Thompson

Ahhh... I think you've caught on that I dumb down problems to the
point of making it the wrong problem

Gee...I dunno if I can devague it more...
I'll try...
I need a fast DC amplifier with an input range of 0 to
-200mV(negative) with a response up to 2Mhz.
The output of the amplifier has to reach 2.5V out for -200mV in.
There is no negative supply present.

I thought a JFET would be best..but spoiled by thermal drift.....
My alternatives were:
Use resistive network + op amp Create a negative supply + op amp
Put one of those 'beyond the rails' op amps to the test.

Many regular opamps can work down to about 300mV below the negative rail
but you'd have to find one that's fast enough and low enough in offset.

Negative rail IC + op amp

If you have a spare inverter somewhere you could make in inverting
switcher.

How about an ordinary single-supply op amp wired as an inverter? Ground
the noninverting input, and bob's your uncle.

Cheers,

Phil Hobbs