K
Ken Smith
Joel Kolstad said:I guess my point here is that while I'd readily admit that the average
design out there probably could obtain a higher yield with no significant
change in cost, there are also times when it's entirely reasonable to accept
a lower yield just so that you can ship the @#$%@# product and get on with
life.
Where I work, if they plan on shipping 10, they buy enough for 9. Anything
less than 100% yeld is considered a problem to solve.
I've heard that the IC yields on high-end 3D graphics chips are
abyssmal -- around 10% -- yet clearly there's a demand for them and it'd be
absurd to suggest that they simply shouldn't be manufactured unless the
yield could be increased.
They have the advange of having millions in the pipeline and a robot to do
the testing. People who use their chips don't have that advantage so they
want 100% of the chips shipped to be tested as good. The IC making
business is quite a diffent world from the IC using businesses.
BTW, I suspect that if you simulate any of those chips with the absolute
worst case tolerances on all the components the yield drops to 0%.
This could well be true today. I bet the makers are trying hard to raise
the yeld by making the parameter spread smaller.