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Help me , running long cables ...

R

rishi

Thanks alot Dear Mac
See what i was thinking :

S1,1 | S10,1 |
--|---------------------|--- R1
S1,2 --|---------------------|--- R2
| | |
| | |
| | |
S1,50--|---------------------|--- R50
| S10,50|
C1 C10
What I don't understand is how you plan to multiplex your 60 IO lines into
500 (or 1000?) switches. Is that where you would use the bus receivers? I
guess it could work. Logically you have 10 banks of 50-line bus receivers.
In reality, each bank may be more than one chip. The banks are all
connected together, and at any given time, only one bank is active,
and the others are disabled with their drivers in a high impedance state.

The 10 remaining lines on your IO board can be configured as outputs, and
each one can select one of the banks.
The other option is trying to find an IO board with 500 IO's on it.

I said 60 IO lines as i would use C1 to C10 as output
lines(writing 1 to each column and tristating other 9
lines) , and read back R1 to R50 to get the state of
all the switches in a column.

I am thinking using optocouplers at the ends and using
higher voltages(24 or 48VDC) for the matrix itself
instead of 5 V.Will this reduce the problems of noise?
I think i can scan at much higher rates maybe 100~150 HZ.
Will there be any problems of propogation delays?
I will be requiring a PCI card with 64 IOs only.

Thanks alot can you please suggest me.
Best Regards
Rishi Bhanot
 
W

Wim Lewis

I would suggest a "smart" button and a shared bus (two wires for signal,
a third for power) which is used to send keypresses back to the PC. Each
button has a serial number, and on a change of state it reports back the
new state and serial number.


A hybrid solution might be best. Build some number of "button-press
concentrators" which sense a few buttons (16 or 20, maybe) and
report any buttonpresses over an rs485 line or similar. They might
each scan a 4x5 matrix, or just sense the buttons directly. You'd only
have to build 25 or 30 of them to cover the entire room, instead
of building 500 individual "smart buttons"; and each concentrator
would be physically closer to the buttons it senses, which would
make the capacitive loading and noise easier to handle.

The OP doesn't mention if there are any latency or ordering requirements
for this --- does it matter if two buttons pressed at almost the same
time are possibly sensed out-of-order? --- which would be an issue with
any of these schemes.
 
M

Mac

Thanks alot Dear Mac
See what i was thinking :

S1,1 | S10,1 |
--|---------------------|--- R1
S1,2 --|---------------------|--- R2
| | |
| | |
| | |
S1,50--|---------------------|--- R50
| S10,50|
C1 C10



I said 60 IO lines as i would use C1 to C10 as output
lines(writing 1 to each column and tristating other 9
lines) , and read back R1 to R50 to get the state of
all the switches in a column.

Oh, I see what you mean. I don't think that will work. You have to
de-bounce the switches somehow, or else they will ring back and forth when
pressed. Also, you will have too much wire connected together, I think.
This will ruin your signal integrity. You will need to add damping, at a minimum.
I am thinking using optocouplers at the ends and using
higher voltages(24 or 48VDC) for the matrix itself
instead of 5 V.Will this reduce the problems of noise?
I think i can scan at much higher rates maybe 100~150 HZ.
Will there be any problems of propogation delays?
I will be requiring a PCI card with 64 IOs only.

I am not sure where you intend to put the opto-couplers. They could help,
but I don't think you need to do anything that complicated.

If you are going to make modifications, do what I said in my earlier post.
Create 10 banks of 50 receivers. On each input, put a shunt capacitor, a
pullup and a 100 Ohm series resistor. Use momentary contact switches which
short the pullup to ground (through the 100-Ohm). The receivers should
probably be inverting schmitt trigger types.

This way, each switch has its own receiver attached, and the
signal integrity will be quite manageable. All these receivers will be
grouped together on a board near the IO board. The outputs of the
receivers for S1,1 - S1,10 will be wire-ored together, and so will S2,1 -
S2,10, etc. Then you will use C1-C10 to enable one bank of receivers at a
time. The logic is pretty much the same as what you propose, but with
a separate receiver for each switch. This means that the board will have a
total of around 20 50-pin connectors for the switches (that way you can
run a separate signal and ground wire to each switch), and another 1 or
two for the IO board, plus power (3.3 or 5V). That's a lot but it's not
impossible.
Thanks alot can you please suggest me.
Best Regards
Rishi Bhanot

You have my suggestion. I hope it helps you. ;-)

Mac
 
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