Maker Pro
Maker Pro

Does anyone see anything inherently wrong with this design?

J

JJ

I fully agree with Mr. Hill's assessment regarding 120us being much slower
than desireable. Really though the situation looks even worse than that
though.

In fact. After looking at the circuit I am led to believe that the circuit
would be an excellent way to celebrate the new year. That is, power it up
as the clock strikes twelve and it should make for an impressive fireworks
display to ring in the new year.

Move that resistor R1 from gate to ground to gate to source of the two
MOSFETs. I think this is a very critical and mandatory change. Imagine
what happens when you try to turn on the MOSFETs. The source rises up to
200V above ground potential. In order for the MOSFET to be on the gate
should be at 10V higher than the source. So in other words the gate is at
210V above ground potential when everything is on. But wait a minute. R1
is between gate and ground. So lessee here. 210V/22k = 9.5mA. Wait a
minute. The only source of current for the gate is through the
optoisolator. But Winfield Hill already determined with a CTR of around 20%
it will only conduct something like 3mA (under bad conditions, the 4N25 will
likely have somewhat better CTR in most cases). Hmm...

3mA < 9.5mA. That is, there is no way this is going to work right. The
drain cannot reach 200V or else the gate resistor will suck away too much
juice, and the gate will no longer keep rising even though bootstrapped.

The solution to this problem is quite simple. Just move the resistor from
gate to ground to gate to source of the MOSFETs.

Still though, the drive is much too weak and too stressful on the MOSFETs.
Maybe it works, but it could be much better without much extra trouble.
Using a much higher CTR optocoupler and using a much smaller value resistor
would be two easy ways to make things better.

I suggest getting a very high gain optocoupler (maybe a photodarlington, but
be weary of the extra voltage loss), and then using a gate-source pull down
resistor of something like 1k.


Have I been abandoned? Why no more replies? Have I said something
to offend anyone?


v/r,
JJ
 
F

Fritz Schlunder

Have I been abandoned? Why no more replies? Have I said something
to offend anyone?


If you are referring to me, no need to worry. You haven't done anything
offensive that I can tell. Some (many) on usenet are pretty easy to offend,
so I wouldn't necessarily even get that concerned if you did once in awhile.

My impression is highly technical people such as electrical
engineers/designers are particularly easy to offend in general, much more so
than the average person. Electrical engineers often aren't the most humble
people in the world (after all, they usually do know substantially more
highly technical and practical knowledge than your average Joe). I know I'm
not very humble.

Sometimes it takes quite a bit of personal effort to formulate a reply on
usenet to a technical question since it invovles you taking a sometimes
significant amount of your own time to answer someone else's
questions/problems with no pay in return. So then if someone else comes
along and hacks up your wonderful work that took so much personal effort by
either replying with something you totally disagree with (or know is
outright wrong), or they come along and point out all the errors and holes
in your thinking (and it is quite easy to make mistakes, electrical
engineering is complicated stuff and humans generally do make lots of errors
anyway), it can be quite irritating.

I myself am guilty of this allot more often than I would like, as are many
others.
 
F

Fritz Schlunder

On Wed, 31 Dec 2003 22:20:23 -0600, JJ <> wrote:

Fritz,

Never mind about question 2. I just figured out that the reason for
the 1k value is to speed up switch-off time.

I'm going to make R1 1K, and go with the MOC207 with 23mA input.. I'm
also going to increase C2's value to 100uF so that the differential
gate/source voltage stays above 10V throughout the 15mS firing cycle.

I believe this means that the turn-on switching time will be
360nC/17.5mA = 21uS.

Also, I'm still wondering about question 1 above.

Sorry for the spaghetti of posts. And thanks again for the wake up
call. :)

v/r,
JJ


Okay. You are correct about the "question 2" thing. The 1k is to speed up
the switch off time.

As for the "question 1" thing... No, there is no reason that I see why you
would need a 47k resistor in parallel with D2. Such a resistor would serve
no function and would be extraneous. It wouldn't hurt anything, but it
isn't needed either. Why not? Well the current that charges C2 flows from
V1 through R2 through D3 through (as displacement current) C2 through L1 and
to ground just fine.

What exactly do you think is going to "latch up" when L1 is removed (and why
is it being removed?)? If L1 is removed then no charging current will flow
through C2 (except the reverse bias leakage of D2 which will be quite small,
possibly much smaller than the leakage of C2 itself), and so it will not be
possible to turn on the MOSFETs. The R1 (between gate-source) will keep
them off in the meantime. But since no current can flow through the MOSFETs
with out L1 to complete the circuit, there is also no way the MOSFETs will
be destroyed. So I'm not sure what you are concerned about, but no extra
resistor is needed as I see it.

Using a MOC207 with 23mA LED current and R1=1k between gate-source will
probably work. However, even so this is still fairly marginal. The 21us
switch on time is approximately what I calculate as well (and the change to
100uF C2 is a good idea). The plateau region of the gate charge curve of
the datasheet shows it lasts for about 175nC (this is the region where
actual switching is occurring). Since you have two of them in parallel this
amounts to 350nC of total charge needed for the switching event itself (not
the whole cycle). So 350nC/17mA=~21us. This is a typical figure though it
may be worse or better based upon part to part variation.

Turn on and turn off times are still quite slow for this kind of use. When
looking at the schematic it is easy to believe that L1 is exactly as you
specified it. That is, it appears as a 300uH inductor with 0.2R DC
resistance. Based upon your description of it in other posts however, I am
led to believe that is not really what this item really is.

An inductor obeys the E=L*dI/dt formula. (where E is applied or generated
voltage, L is the inductance in Henries, and dI/dt is change in current over
change in time in amps per second) An originally air core 300uH inductor
suddenly becomes something else entirely when you place a solid chunk of
conductive metal in the center of it. With a solid chunk of metal in the
center of it, it is much more like a transformer where the 300uH worth of
windings is the primary and the secondary is the chunk of metal on the
interior. The secondary is a single turn, but of extremely low resistance.
So what happens when you apply a voltage to this coil and "projectile"
combo? Well a B field is produced by the primary of the coil. As this B
field is increasing however, it induces a voltage in the single shorted turn
secondary. This voltage induces a very strong current to flow in the
secondary shorted turn. Well, this current in turn generates its own B
field which opposes and cancels most of the B produced by the primary. The
interaction of these two B fields is what produces the force that
accelerates the "projectile."

The basic problem is the current will ramp up pretty much instantly to
whatever the resistance of the primary coil and secondary shorted turn limit
it to. This is not how a real 300uH inductor behaves at all.

If you were switching a real 300uH inductor the current would be quite small
after ~21us of switch on time. So while the MOSFET is switching, although
large voltages are appearing accross the MOSFET, the current flowing through
it is small and so P=IV is quite small. The turn on stress is minimal.

If this isn't a real 300uH inductor, but behaves much more like a simple
very low value resistor, then the current will instantly ramp up to the
maximum that V=IR or the MOSFET limits it to. So for switching on this
"resistive" load the MOSFET will be passing large current and large voltage
accross it during the majority of that 21us switch on time.

Still though 21us isn't that long and you can guesstimate what the MOSFET
die is capable of by looking at the safe operating area graph of the
datasheet. So it may work even though still fairly stressful. The
datasheet indicates it can handle something like 250V at 300A for 25us if
the initial die temp is 25 deg. C.

http://www.ixys.com/98879.pdf

See figure 12. Interestingly the SOA curve doesn't include currents larger
than 300A even though it claims 480A peak currents are okay. I hope the
capacitor C1 is mostly or fully drained by the time the 15ms is up (or
whenever switch off occurs in the event of unusual performance like if the
uController isn't programmed right, etc.), or it will have to undergo
another high stress and long duration shutoff. The 1k resistor only
produces about 5.5mA of turn off current based upon figure 10 of the
datasheet. So the turn off time could be something as bad as say
350nC/5.5mA = ~64us.

To get both fast turn on and turn off you might strongly consider the
possibility of using extra booster transistors kind of like this:

http://www.irf.com/technical-info/designtp/dt94-12.pdf

Or perhaps a dedicated MOSFET gate driver IC such as the TC4427 available
from Digikey and others:

http://www.microchip.com/download/lit/pline/analog/power/mosfet/21422b.pdf

In the absence of this I would suggest using an even higher CTR optoisolator
such as the TLP421BL (available from Digikey). It claims a minimum 200% CTR
for the specified test conditions (others conditions may not be this good).
Keep in mind the CTR degrades over time, especially with high temperatures.

http://www.toshiba.com/taec/components/Datasheet/TLP421.pdf

I'm not quite sure by how much, but a few optoisolator datasheets sometime
give some figures. I can't tell you which ones right off but if you look at
enough of them you are bound to find some.

The next thing I might do is place a small capacitor of a few nanofarad
(maybe 10nF) in parallel with R3. Presumably the microcontroller IO pin can
handle peak currents higher than the DC value. If you place a capacitor in
parallel with R3 it will give the LED an extra jolt of current during the
transition to get the MOSFET gates turned on in a greater hurry. This may
not make the actual high stress MOSFET transition any better though if this
extra jolt of rapid juice doesn't bring the gates up to ~5.5V or so where
the plateau occurs. If this is the case, then maybe I wouldn't do this
since it places extra stress on the microcontroller without any real
benefit.

Oh, one more thing. This is mainly just my personal preference so you don't
have to do this, but when making your schematics try to make the main
currents go vertically from top to bottom. As it is your schematic is very
hard to understand and takes much longer to figure out what is going on.
 
F

Fritz Schlunder

In the absence of this I would suggest using an even higher CTR optoisolator
such as the TLP421BL (available from Digikey). It claims a minimum 200% CTR
for the specified test conditions (others conditions may not be this good).
Keep in mind the CTR degrades over time, especially with high temperatures.

http://www.toshiba.com/taec/components/Datasheet/TLP421.pdf


Hmm... Even better still would probably be the H11A817D (available from
Digikey):

http://www.fairchildsemi.com/ds/H1/H11A817.pdf

It claims a minimum 300% CTR given their test conditions. With 300% CTR
things are starting to look not so bad.
 
J

JJ

Okay. You are correct about the "question 2" thing. The 1k is to speed up
the switch off time.

As for the "question 1" thing... No, there is no reason that I see why you
would need a 47k resistor in parallel with D2. Such a resistor would serve
no function and would be extraneous. It wouldn't hurt anything, but it
isn't needed either. Why not? Well the current that charges C2 flows from
V1 through R2 through D3 through (as displacement current) C2 through L1 and
to ground just fine.

What exactly do you think is going to "latch up" when L1 is removed (and why
is it being removed?)? If L1 is removed then no charging current will flow
through C2 (except the reverse bias leakage of D2 which will be quite small,
possibly much smaller than the leakage of C2 itself), and so it will not be
possible to turn on the MOSFETs. The R1 (between gate-source) will keep
them off in the meantime. But since no current can flow through the MOSFETs
with out L1 to complete the circuit, there is also no way the MOSFETs will
be destroyed. So I'm not sure what you are concerned about, but no extra
resistor is needed as I see it.

Ok, thanks (and thanks for the huge reply!) My only concern was that
with no ground reference (with L1 removed - it is replaceable), the
the FETs might latch up and hold a 200V surprise for anyone replacing
the coil. (Granted, the system should be powered down first, but what
can happen....)

If you're cetain that the gate source resistor wil prevent this (even
with no ground potential), then I won't add the resistor across D2.
Using a MOC207 with 23mA LED current and R1=1k between gate-source will
probably work. However, even so this is still fairly marginal. The 21us
switch on time is approximately what I calculate as well (and the change to
100uF C2 is a good idea). The plateau region of the gate charge curve of
the datasheet shows it lasts for about 175nC (this is the region where
actual switching is occurring). Since you have two of them in parallel this
amounts to 350nC of total charge needed for the switching event itself (not
the whole cycle). So 350nC/17mA=~21us. This is a typical figure though it
may be worse or better based upon part to part variation.

Turn on and turn off times are still quite slow for this kind of use. When
looking at the schematic it is easy to believe that L1 is exactly as you
specified it. That is, it appears as a 300uH inductor with 0.2R DC
resistance. Based upon your description of it in other posts however, I am
led to believe that is not really what this item really is.

An inductor obeys the E=L*dI/dt formula. (where E is applied or generated
voltage, L is the inductance in Henries, and dI/dt is change in current over
change in time in amps per second) An originally air core 300uH inductor
suddenly becomes something else entirely when you place a solid chunk of
conductive metal in the center of it. With a solid chunk of metal in the
center of it, it is much more like a transformer where the 300uH worth of
windings is the primary and the secondary is the chunk of metal on the
interior. The secondary is a single turn, but of extremely low resistance.
So what happens when you apply a voltage to this coil and "projectile"
combo? Well a B field is produced by the primary of the coil. As this B
field is increasing however, it induces a voltage in the single shorted turn
secondary. This voltage induces a very strong current to flow in the
secondary shorted turn. Well, this current in turn generates its own B
field which opposes and cancels most of the B produced by the primary. The
interaction of these two B fields is what produces the force that
accelerates the "projectile."

The basic problem is the current will ramp up pretty much instantly to
whatever the resistance of the primary coil and secondary shorted turn limit
it to. This is not how a real 300uH inductor behaves at all.

If you were switching a real 300uH inductor the current would be quite small
after ~21us of switch on time. So while the MOSFET is switching, although
large voltages are appearing accross the MOSFET, the current flowing through
it is small and so P=IV is quite small. The turn on stress is minimal.

If this isn't a real 300uH inductor, but behaves much more like a simple
very low value resistor, then the current will instantly ramp up to the
maximum that V=IR or the MOSFET limits it to. So for switching on this
"resistive" load the MOSFET will be passing large current and large voltage
accross it during the majority of that 21us switch on time.

Still though 21us isn't that long and you can guesstimate what the MOSFET
die is capable of by looking at the safe operating area graph of the
datasheet. So it may work even though still fairly stressful. The
datasheet indicates it can handle something like 250V at 300A for 25us if
the initial die temp is 25 deg. C.

http://www.ixys.com/98879.pdf

See figure 12. Interestingly the SOA curve doesn't include currents larger
than 300A even though it claims 480A peak currents are okay. I hope the
capacitor C1 is mostly or fully drained by the time the 15ms is up (or
whenever switch off occurs in the event of unusual performance like if the
uController isn't programmed right, etc.), or it will have to undergo
another high stress and long duration shutoff. The 1k resistor only
produces about 5.5mA of turn off current based upon figure 10 of the
datasheet. So the turn off time could be something as bad as say
350nC/5.5mA = ~64us.

To get both fast turn on and turn off you might strongly consider the
possibility of using extra booster transistors kind of like this:

http://www.irf.com/technical-info/designtp/dt94-12.pdf

Or perhaps a dedicated MOSFET gate driver IC such as the TC4427 available
from Digikey and others:

http://www.microchip.com/download/lit/pline/analog/power/mosfet/21422b.pdf

In the absence of this I would suggest using an even higher CTR optoisolator
such as the TLP421BL (available from Digikey). It claims a minimum 200% CTR
for the specified test conditions (others conditions may not be this good).
Keep in mind the CTR degrades over time, especially with high temperatures.

http://www.toshiba.com/taec/components/Datasheet/TLP421.pdf

I'm not quite sure by how much, but a few optoisolator datasheets sometime
give some figures. I can't tell you which ones right off but if you look at
enough of them you are bound to find some.

The next thing I might do is place a small capacitor of a few nanofarad
(maybe 10nF) in parallel with R3. Presumably the microcontroller IO pin can
handle peak currents higher than the DC value. If you place a capacitor in
parallel with R3 it will give the LED an extra jolt of current during the
transition to get the MOSFET gates turned on in a greater hurry. This may
not make the actual high stress MOSFET transition any better though if this
extra jolt of rapid juice doesn't bring the gates up to ~5.5V or so where
the plateau occurs. If this is the case, then maybe I wouldn't do this
since it places extra stress on the microcontroller without any real
benefit.

Ok, it's been a long day. Been designing and erasing and designing
agian all day. But, I think I finally have it. (I posted another
schematic in ABSE.)

What I did was I took that layout depicted in the dt94.pdf link that
you posted and started thinking about that type of approach.

I couldn't just cut a copy it right into my design for a couple of
reasons, the main one being I can't afford to have that constant IZT
drain of the zener on C1. It would mean that the charging circuit
would be working too much. Also, I didn't like the fact that the LED
in the opto had to stay ON in order for the circuit NOT to fire.

So, I worked around the zener issue, and eliminated the opto
altogether.

I thought about the things that you said in your post, and I think
that I've really got the switching time down low.

Ok, here goes:

For starters, change the value on the schematic for R4 from 22K to
1.2K. I always notice these things right AFTER hitting the send
button. :)

Initially, there is 0V out from the uP (V2). Q5 is off, and there is
~12V at the R2/3/4 junction. Q4 is on (through R3), Q3 is off and the
FETs are off. C2 charges to ~12V through D3 and L1. C1 is at 200V.

Then, the uP sends out a 5V/15mS pulse, turning on Q5, which pulls the
R2/3/4 junction to near ground potential. This turns Q4 off and Q3 on
(through R4). The 12V charge on C2 is applied to the gate of the FETs
through Q3 and R1, with 10mA of base current through R4 (1.2K not
22K). The Hfe of Q3 at Ib 10mA is 100 min. which means that the gate
current being applied to the 360nC is at least 500mA for a turn on
time of 360nC/.5 = 720nS max.

After the FETs switch on, 200V is bootstrapped into C2 which in turn
keeps the gates of the FETs at or above 10V higher than their sources
(through Q3) for the duration of the firing sequence.

After 15ms, the uP goes low again. Q5 turns off, and ~12V is then
reapplied to the R2/3/4 junction. Q3 turns off, removing the signal
voltage from the gate of the FETs. Q4 turns on, providing a ground
path for the gate charge of the FETs. (Q4 is rated at 300Vceo, by the
way.)

The Ib through Q4 at this point is ~10mA. The Hfe of Q4 with a 10mA
base current is 50 min. which results in ~500mA (best case) of gate
current, which means that the turn-off switching time is longer.
However, since C1 has fully dishcarged, the currnet through L1 is only
12V/.2ohm = 60A - as opposed to ~300A when switching on.

I could increase the base current through Q4 via R2/3, if you think
the switch off time still neds to be decreased.

So, there you have it. Let me know how badly I screwed up! :)
I just re-read this post three times to make sure I got all of my Q4s
and R2s right. And now, I going to click send. :)

Oh, one more thing. This is mainly just my personal preference so you don't
have to do this, but when making your schematics try to make the main
currents go vertically from top to bottom. As it is your schematic is very
hard to understand and takes much longer to figure out what is going on.

I corrected that, too. :)

Thank you SO MUCH for your help Fritz!

v/r,
JJ
 
J

JJ

Ok, thanks (and thanks for the huge reply!) My only concern was that
with no ground reference (with L1 removed - it is replaceable), the
the FETs might latch up and hold a 200V surprise for anyone replacing
the coil. (Granted, the system should be powered down first, but what
can happen....)

If you're cetain that the gate source resistor wil prevent this (even
with no ground potential), then I won't add the resistor across D2.


Ok, it's been a long day. Been designing and erasing and designing
agian all day. But, I think I finally have it. (I posted another
schematic in ABSE.)

What I did was I took that layout depicted in the dt94.pdf link that
you posted and started thinking about that type of approach.

I couldn't just cut a copy it right into my design for a couple of
reasons, the main one being I can't afford to have that constant IZT
drain of the zener on C1. It would mean that the charging circuit
would be working too much. Also, I didn't like the fact that the LED
in the opto had to stay ON in order for the circuit NOT to fire.

So, I worked around the zener issue, and eliminated the opto
altogether.

I thought about the things that you said in your post, and I think
that I've really got the switching time down low.

Ok, here goes:

For starters, change the value on the schematic for R4 from 22K to
1.2K. I always notice these things right AFTER hitting the send
button. :)

Initially, there is 0V out from the uP (V2). Q5 is off, and there is
~12V at the R2/3/4 junction. Q4 is on (through R3), Q3 is off and the
FETs are off. C2 charges to ~12V through D3 and L1. C1 is at 200V.

Then, the uP sends out a 5V/15mS pulse, turning on Q5, which pulls the
R2/3/4 junction to near ground potential. This turns Q4 off and Q3 on
(through R4). The 12V charge on C2 is applied to the gate of the FETs
through Q3 and R1, with 10mA of base current through R4 (1.2K not
22K). The Hfe of Q3 at Ib 10mA is 100 min. which means that the gate
current being applied to the 360nC is at least 500mA for a turn on
time of 360nC/.5 = 720nS max.

After the FETs switch on, 200V is bootstrapped into C2 which in turn
keeps the gates of the FETs at or above 10V higher than their sources
(through Q3) for the duration of the firing sequence.

After 15ms, the uP goes low again. Q5 turns off, and ~12V is then
reapplied to the R2/3/4 junction. Q3 turns off, removing the signal
voltage from the gate of the FETs. Q4 turns on, providing a ground
path for the gate charge of the FETs. (Q4 is rated at 300Vceo, by the
way.)

The Ib through Q4 at this point is ~10mA. The Hfe of Q4 with a 10mA
base current is 50 min. which results in ~500mA (best case) of gate
current, which means that the turn-off switching time is longer.
However, since C1 has fully dishcarged, the currnet through L1 is only
12V/.2ohm = 60A - as opposed to ~300A when switching on.

I could increase the base current through Q4 via R2/3, if you think
the switch off time still neds to be decreased.

So, there you have it. Let me know how badly I screwed up! :)
I just re-read this post three times to make sure I got all of my Q4s
and R2s right. And now, I going to click send. :)



I corrected that, too. :)

Thank you SO MUCH for your help Fritz!

v/r,
JJ


Heh. Clicked "send" too soon again! :)

Reducing R4 to 1.2K requires C2 to be increased to 100u in order to
keep the gate-source voltage above 10V throughout the firing sequence.

So, change C2 to be 100uF on the schematic prior to analyzing the
circuit, please.

Tks,
JJ
 
F

Fritz Schlunder

Then carefully and remotely, for a brief amount of time, connect the
other wire to the + side of the battery.
Hope nobody was near those wires, because they are going to *JUMP*
like all hell!


Are you sure? Have you tried this experiment? What is the physical
scientific explanation of this rather violent behavior?

I guess I'm a big skeptical since a little camera flash xenon strobe can
often achieve peak currents in the vicinity of around 300 amps.
Theoretically this should produce forces say three tenths as strong as your
scenario right?

I've played with a number of xenon strobes, some of which were constructed
on simple breadboards with 22 AWG copper wires. The forces generated during
a discharge event don't even seem to be enough to make the wires wiggle in
the least bit.
 
W

Winfield Hill

JJ wrote...
Ok, it's been a long day. Been designing and erasing and designing
agian all day. But, I think I finally have it. (I posted another
schematic in ABSE.)

I don't have a clue as to how that circuit can possible work,
or how it can avoid blowing itself to the other place. :>)

Given that your understanding is so poor, why not invest a few
cents in a standard single-chip solution, like IRF's 21xx series,
say their IR2117 or the IR2128, which features current-limiting.

http://www.irf.com/product-info/datasheets/data/ir2117.pdf
http://www.irf.com/product-info/datasheets/data/ir2127.pdf

These parts are well suited to driving FETs or IGBTs. Contrary
to your assertion, IGBTs are much less expensive than FETs for
a given capability, because they require less silicon to make.

Thanks,
- Win

whill_at_picovolt-dot-com
 
W

Winfield Hill

Winfield Hill wrote...
IR2117 or the IR2128, which features current-limiting.

oops, I meant to say current sensing.

Thanks,
- Win

whill_at_picovolt-dot-com
 
J

JJ

JJ wrote...

I don't have a clue as to how that circuit can possible work,
or how it can avoid blowing itself to the other place. :>)

Given that your understanding is so poor, why not invest a few
cents in a standard single-chip solution, like IRF's 21xx series,
say their IR2117 or the IR2128, which features current-limiting.

http://www.irf.com/product-info/datasheets/data/ir2117.pdf
http://www.irf.com/product-info/datasheets/data/ir2127.pdf

These parts are well suited to driving FETs or IGBTs. Contrary
to your assertion, IGBTs are much less expensive than FETs for
a given capability, because they require less silicon to make.

Thanks,
- Win

whill_at_picovolt-dot-com


Win,

Excellent idea. Thank you. I did not know those chips existed.

Tks,
JJ
 
F

Fritz Schlunder

Ok, thanks (and thanks for the huge reply!) My only concern was that
with no ground reference (with L1 removed - it is replaceable), the
the FETs might latch up and hold a 200V surprise for anyone replacing
the coil. (Granted, the system should be powered down first, but what
can happen....)

If you're cetain that the gate source resistor wil prevent this (even
with no ground potential), then I won't add the resistor across D2.


Well with the resistor between gate and source there would be no way to turn
the MOSFETs on once C2 gets drained. It is important to realize that
MOSFETs only care about their gate to source and drain to source voltages.
If the gate is at the same potential as the source pin, it doesn't matter
where in the circuit the device is or what "ground" is, the channel will be
very high resistance.


Ok, it's been a long day. Been designing and erasing and designing
agian all day. But, I think I finally have it. (I posted another
schematic in ABSE.)

Hmm... Well I hate to disappoint you but I liked the other design with the
optoisolator and the previously discussed modifications (with the 300% CTR
optoisolator) much better than the new design. With the old design but
using a 300% CTR optoisolator the turn on time becomes somewhat reasonable
and well within the SOA curve for these devices (figure 12 of the
datasheet):

http://www.ixys.com/98879.pdf

Upon closer inspection of the SOA curves it looks like you might be running
these devices either right on the edge or exceeding the SOA somewhat during
the main discharge on time. It is kind of hard to tell for sure.

This new design is most peculiar. I've never seen anything quite like it.
It looks like it sorta might work (maybe), and I'm guessing you simulated it
with the given parameters and it worked. I certainly would not use it
though. I notice you changed the 300uH inductor into a 1uH inductor. I
don't think this change really makes for a more accurate model of reality.
It is pretty hard to scientifically quantify what the coil will really
behave like since it depends upon so many things that aren't to easy to
specify. The 0.2R DC resistance is guaranteed to be there, but my guess is
the current will intially ramp up very rapidly (although perhaps slowed a
little bit by "leakage inductance") to some fairly high value, but then on
top of that you will also have an increasing current waveform. But further
complicating this is the main capacitor C1 will be decaying and thus the
current would tend to decrease, or at least stop ramping up at such as fast
rate. Meanwhile the projectile starts moving and further interacting
causing other changes. Ultimately I have no idea how much the coil will
behave as a resistor and how much as an inductor, but I doubt 1uH with 0.2R
DC resistance is it. I suspect both the resistive and inductive components
will behave as somewhat larger values, but they might be dynamic.

So... Back to your circuit...

Suppose what happens with your circuit when you first try to turn it on. Q5
turns on and that central node with R2, R3, and R4 goes near ground. Okay.
So Q3 turns on and under the initial conditions there is about 12V minus two
diode drops at the base of Q3. Since the collector node of Q5 is at near
ground potential resistor R4 conducts something like 10V/1.2k = 8.3mA. Okay
not bad. But wait a minute. As the MOSFETs turns on the source rises up to
200V. If that is so, then the top of C2 rises up as well to ~211V above
ground potential. The base of Q3 is one diode drop lower than this at
around ~210V. Even so, the other side of R4 is still at ground potential.
So R4 has about 210V across it. At 1.2k this works out to 175mA at 210V.
Ouch. That is almost 37 watts of dissipation and it is going to start
draining C2 very fast (even if it is 100uF). If C2 loses voltage too fast
(or the C1 doesn't discharge fast enough because the coil's inductance isn't
1uH but more and is slowing things down), then it may start starving the
voltage provided to the gate. If this happens then the MOSFETs enter linear
operation and you've got trouble. Maybe this won't happen and everything
will work fine... But gee... It is nonetheless quite scary and perhaps
stressful on the driving components. What happens during turn off is also
equally peculiar.

Why are you using MOSFETs for this application? Winfield Hill preaches the
benefits of IGBT technology, and although I tend to agree with him about the
greatness of IGBTs in pulse current applications, 200V is right on the edge
where MOSFETs may in some cases still be attractive. The higher the voltage
the more and more attractive the IGBTs get.

Four or five IRG4BC40F devices in parallel might be adequate for this
application and they only cost $3.52 each in ten unit quantities from
Digikey. That is cheaper than the two MOSFETs isn't it? Datasheet at:

http://www.irf.com/product-info/datasheets/data/irg4bc40f.pdf

Why aren't you using an SCR device instead? By the sounds of the
description and energy values it seems like all you are trying to do is
rapidly discharge your capacitor bank into the coil. It sounds like you
want all the energy available. If this is what you are trying to do, there
really is no better choice than an SCR. They have by far the best pulse
current handling capability at high voltages of really pretty much any
semiconductor switching device (with the possible exception of plain
diodes). You can get allot of bang for your buck with SCRs.

If this is really all you need something like the S6055R made by Teccor
available from Digikey will set you back a paltry $2.49 in 100 unit
quantities ($3.11 for one). If we look at the datasheet:

http://rocky.digikey.com/WebLib/Teccor/Web Data/S4016N RP.pdf

We notice in figure E6.3 the device can handle something like 760A peak
capacitive discharges where five time constants equals 15ms. Thus perhaps
only one device is needed. If not, then a slightly larger device could be
used.

Of course SCRs have different drive requirements.

I corrected that, too. :)


Yes, thanks glad to see it. It is much easier to read this way.
 
J

JJ

<snip entire thread just for this post>

Fritz,

Firstly, I thank you for sticking with me on this design thread. Your
thoughtful and insightful replies have been invaluable to me.

Granted, I'm obviously no EE. I'm just a hobbyist who is trying
desperately to figure all of this stuff out and create a working
circuit.

After reading Win's post early today (which pointed out my stupid
thinking on the schematic that I posted), I got really depressed.
Although Win was in no way punitive in his post (he simply saw that I
didn't fully understand what I was dealing with and offered an
alternative that I could more easily understand instead), I really got
bummed out about the issue.

He was right to state that I don't fully understand the dynamics that
I'm attempting to manipulate here. But I am a strong learner, and
many people that know me would tell you very quickly that I am as
stubborn as a mule when I get my mind set on something. And,
obviously, my mind is indeed set on getting this design done properly.
:)

Nonetheless, I spent the day today mostly bummed out and feeling bad
about myself.

I realize now that my first two posted circuits have flaws. I also
realize that my second circuit, in particular, has shoot-through
issues which most likely would have resulted magic smoke. (Thank you
again, Win.) :)

I have been doing a lot of research in these past few days, and I have
learned an awful lot.

In fact, I spent the day today (after reading Win's reply) working on
a new transistor design which wouldn't explode upon activation.

Now, at this point, I plan to go with Win's suggestion of using the
IR2117 Driver chip and be done with it.

However, I'm also going to post a schematic that I spent the day
working on to ABSE (High Side Firing Circuit 3.jpg) which incorporates
a discrete transistor solution.

I ask that you (or Win) simply let me know if that design will or will
not work. Did I finally get it right? Or did I fail miserably again?

Again, I thank you for your replies! I will re-read your previous
reply in the morning and will reply to it under the ongoing thread.

Thanks again, Fritz!

v/r,
JJ

P.S. I changed L1 to 1uH in an attempt to better simulate the coil
under the conditions that you described earlier. I realize that 1uH
may or may not represent the real world...but you were right in that
the current ramps up to max value in that scenario. (IOW, I think
that placing a 1uH value on L1 results in a more real world
simulation.)
 
F

Fritz Schlunder

<snip entire thread just for this post>

Fritz,

Firstly, I thank you for sticking with me on this design thread. Your
thoughtful and insightful replies have been invaluable to me.

No problem.

Granted, I'm obviously no EE. I'm just a hobbyist who is trying
desperately to figure all of this stuff out and create a working
circuit.

Don't let this bother you too much. My impression is EE programs in general
don't cover practical and real world useful information very much. I can
only talk from my own exerience with a single EE program (Arizona State
University in my case), but my impression is this is true of most EE
programs. All they want to talk about is mathematics and "theory" type
things. Although knowing math and theory can certainly be helpful, and
definitely isn't hurtful, it isn't usually instantly practical or
applicable. High side MOSFET gate drive techniques is something way too
practical and instantly useful for them to teach (although admittedly
wouldn't be useful for everyone).

The net result is a recent EE graduate can often have dramatically inferior
circuit designing capabilities to any dedicated serious hobbiest.

After reading Win's post early today (which pointed out my stupid
thinking on the schematic that I posted), I got really depressed.
Although Win was in no way punitive in his post (he simply saw that I
didn't fully understand what I was dealing with and offered an
alternative that I could more easily understand instead), I really got
bummed out about the issue.

Yeah my thought is it is better to take your lumps in this stage of
development rather than later. That is... If you build a circuit with
design problems it will most likely explode if you are playing with high
voltages and high currents. When your circuits always explode it can take a
real toll on self esteem, perhaps even a lasting toll. Usually it is very
difficult to learn very much by trial and error when it comes to power
electronics. Usually there are just far too many reasons that could result
in your device failure that it is very difficult to know for sure what
caused the problem. Also, it tends to get quite expensive if you blow away
dozens or more of expensive MOSFETs. If you figure out all of the problems
with a design in the development stage, it can save quite a bit of
money/time/heartache.

MOSFET characteristics and their gate drive requirements is quite a tricky
subject. I've been playing around with them for a long time now but I still
learn new things about them somtimes. But rest assured if you persevere
(and don't skip the research steps) you will get it eventually.

If you build your high power circuits and they work flawlessly and robustly
(especially the first time around), it can have an opposite effect on self
esteem. It always gives me a temporary boost when I make something really
great that works well. It makes me feel powerful, like I know what I am
doing, etc.

He was right to state that I don't fully understand the dynamics that
I'm attempting to manipulate here. But I am a strong learner, and
many people that know me would tell you very quickly that I am as
stubborn as a mule when I get my mind set on something. And,
obviously, my mind is indeed set on getting this design done properly.
:)


Okay. Go and read this document, "Design and Application Guide for High
Speed MOSFET Gate Drive Circuits" by Laszlo Balogh distributed by Texas
Instruments:

http://focus.ti.com/lit/ml/slup169/slup169.pdf

It is a very long document, but extremely useful for anyone interested in
MOSFET gate drive. This is by far the most difinitive resource on this
topic I have seen to date. After reading this document, take a look at the
references section at the end. Read all of the references by International
Rectifier. They are also extremely useful. They can be found on
International Rectifier's web site:

http://www.irf.com

The TI document talks quite a bit about boostrap drive techniques which is
of particular interest to you. Read all of it though, it is very useful.

I realize now that my first two posted circuits have flaws. I also
realize that my second circuit, in particular, has shoot-through
issues which most likely would have resulted magic smoke. (Thank you
again, Win.) :)

I have been doing a lot of research in these past few days, and I have
learned an awful lot.

Good. You will probably learn this stuff faster than it took me (especially
if you read those documents I've suggested). I can tell you it took more
than a few days in my case.

In fact, I spent the day today (after reading Win's reply) working on
a new transistor design which wouldn't explode upon activation.

Now, at this point, I plan to go with Win's suggestion of using the
IR2117 Driver chip and be done with it.

However, I'm also going to post a schematic that I spent the day
working on to ABSE (High Side Firing Circuit 3.jpg) which incorporates
a discrete transistor solution.

I ask that you (or Win) simply let me know if that design will or will
not work. Did I finally get it right? Or did I fail miserably again?

Alright. Well... The new design isn't quite right either, however I can
tell you it is starting to look reminiscent of the bootstrap drive
techniques that are employed inside integrated circuits like the IR2117.

R5 doesn't appear to serve any purpose. D3 has too little voltage blocking
ability (needs to be over 200V capable). Q5 is rated for too little
voltage. When the MOSFETs are on the gate is at about 210V. The base of Q3
should therefore be about one diode drop higher than this. If this is so,
then Q5 would have to be rated for more than 210V. Without doing any
calculations C2 looks like it might be a little smaller than desireable even
if it does work fine (good to have a little design margin). Otherwise it
appears similar to other tried and true boostrap driver designs out there.

Again, I thank you for your replies! I will re-read your previous
reply in the morning and will reply to it under the ongoing thread.

Look forward to reading it.
 
J

John Larkin

No problem.



Don't let this bother you too much. My impression is EE programs in general
don't cover practical and real world useful information very much. I can
only talk from my own exerience with a single EE program (Arizona State
University in my case), but my impression is this is true of most EE
programs. All they want to talk about is mathematics and "theory" type
things. Although knowing math and theory can certainly be helpful, and
definitely isn't hurtful, it isn't usually instantly practical or
applicable. High side MOSFET gate drive techniques is something way too
practical and instantly useful for them to teach (although admittedly
wouldn't be useful for everyone).

The net result is a recent EE graduate can often have dramatically inferior
circuit designing capabilities to any dedicated serious hobbiest.

A formal EE education does emphasize the physics and mathematics of
things. In four years, one *could* study a few (out of millions of
possible) "practical" circuit tricks, and then one could maybe go out
and apply them for a couple of years, doing predictably trivial
designs until one became obsolete.

A solid mathemetical basis for engineering design allows one to adapt
to almost any new technology. Hobbiests are too often lacking in real,
quantitative design and analysis skills, so they can have a lot of fun
but their design techniques don't scale well.

I think the best EEs have a classical theoretical education, heavy on
the math and science, followed by a lot of challenging real-world
design. No, they aren't usually good designers the day after they
graduate, and many never are, but they have indespensable tools to
become good. My EE education included practical and theoretical stuff,
and the practical stuff is now fully obsolete, but physics, signals
and systems, and control theory are eternal.

Being a hobbyist before and during the formal education is immensely
helpful in making the theory really soak in.

John
 
J

John Woodgate

I read in sci.electronics.design that John Larkin <jjlarkin@highlandSNIP
techTHISnologyPLEASE.com> wrote (in <v9pgvvob2nqqu640hc6r7f4icqcq04hik6@
4ax.com>) about 'Does anyone see anything inherently wrong with this
design?', on Sun, 4 Jan 2004:
Being a hobbyist before and during the formal education is immensely
helpful in making the theory really soak in.

Yes. You need to have about 8 years practical experience before you
start your EE course. THEN when you graduate, you CAN design stuff.
 
J

John Larkin

I read in sci.electronics.design that John Larkin <jjlarkin@highlandSNIP
techTHISnologyPLEASE.com> wrote (in <v9pgvvob2nqqu640hc6r7f4icqcq04hik6@
4ax.com>) about 'Does anyone see anything inherently wrong with this
design?', on Sun, 4 Jan 2004:


Yes. You need to have about 8 years practical experience before you
start your EE course. THEN when you graduate, you CAN design stuff.

Right, sort of like going to sea when you're eight years old.

John
 
W

Winfield Hill

JJ wrote...
The DCR of the coil is 0.2 ohms, and the ESR of C1 is 0.014 ohms.
That, coupled with the FET Rds(on) as well as wiring losses should
result in ~600+ amps peak through the coil. I don't have a current
clamp with which to measure it, but I suspect that it's pretty close.

The arrangement as it is now works well in that it moves a 1" diameter
steel rod a distatnce of 10.5" in 24mS. But again, that is with the
FETs on the low side. I have not yet built the circuit that we're
discussing now.

You're moving the steel rod through the coil and on past it? What's
the current waveform in the coil, does it go to zero or reverse before
the rod gets through the coil, or is it retarding the rod as it leaves?
If you want to turn off the current and have it cease quickly, you'll
need to allow a much higher flyback voltage than one diode drop. :>)
I thought about going with IGBTs, but they're too expensive. The
120N25's are only $14 each (cheaper in bulk). DigiKey has IGBTs
that will work, but the price range is $80 to $176!

I'm surprised at your numbers. For example a 250V irg4p254s IGBT
will drop only 2.7V at 150A (when hot), so four in parallel nicely
handles 600A. They cost $5.47 qty 100. Even more attractive, the
irg4pc50f is rated for 600V (nice, allowing for 400V of flyback!)
and drops only 3V at 150A when hot. It's cheaper yet at $4.96 qty
100. DigiKey has both types in stock.

You may feel a 3V drop is not significant, but one should seek to
minimize junction heating from P = IV dissipation, which is 450W
for the 4pc50. Its Transient Thermal Impedance curves give us a
modest 0.3 C/W for 15ms, for an acceptable 135C single-pulse rise.

Let's examine the rather-brief IXYS datasheet. A novice engineer
might take the 120N25's 20-milli-ohm Rds(on) spec at face value,
but at high currents (and the resulting high junction temperatures
during a pulse) it'll be nearly 2x higher for 200A and Tj = 100C,
as shown by figures 4 and 5, or more like 40 milli-ohms. Therefore
200A in a 120N25 will result in a Vds = 8V drop, substantially more
voltage than 4V for a set of the lower-cost IGBTs I suggested. The
single-pulse Transient Thermal Resistance curve, fig 12, gives us
a nice low 0.06C/W for 15ms (the 120N25 has a much larger die than
the 4pc50), so that 200A * 8V = 1600W. This is more dissipation
than the IGBTs see, yet we still get a reasonable Tj rise of 96C.
So you might be able to parallel three 120N25 FETs for single 600A
15ms pulses and keep their junction temp rise under control. But
four FETs would be much safer, given the FET's current sharing
won't be perfect.

Given the above, I suggest IBGTs in your application. However I'd
prefer to use a single high-current part for 600A pulses, rather
than parallel lower-current parts. For example Toshiba's popular
MG300 or MG400 modules drop about 3.5V at 600A.

Of course, this assumes you're actually going to get 600A pulses.
[Respectfully, until you learn more, and also get a non-saturating
current probe (e.g. a Tek CT-3 with AM503 and A6302) or some high-
current shunts, and take some measurements, I'll reserve my right
to remain skeptical.] If in fact you don't end up with much over
200 or 300A, then a few of the appropriate TO-247 or TO-264 parts
may well suffice for you.

Thanks,
- Win

whill_at_picovolt-dot-com
 
K

Keith R. Williams

I read in sci.electronics.design that John Larkin <jjlarkin@highlandSNIP
techTHISnologyPLEASE.com> wrote (in <v9pgvvob2nqqu640hc6r7f4icqcq04hik6@
4ax.com>) about 'Does anyone see anything inherently wrong with this
design?', on Sun, 4 Jan 2004:


Yes. You need to have about 8 years practical experience before you
start your EE course. THEN when you graduate, you CAN design stuff.

As a kid I did some rather *challenging* experiments, and
survived. In college I went for the practical and came out as a
rather experienced designer. I was respected as a contributor
from day two ("one" was filling out the paper and teaching the
old-farts about op-amps ;-) and learned quickly over the next six
months. I had my own projects pretty much thereafter.

UIUC had a very practical undergraduate program and we were
highly sought. At one time there were six (out of perhaps ten-
twelve) of us in the department. The boss wanted us even over
his alma mater's.

All colleges are *not* the same. All graduates are certainly not
the same.
 
K

Keith R. Williams

Right, sort of like going to sea when you're eight years old.

Well, my father (an EE Prof at UIUC) took me to work with him as
soon as I could walk. ;-)
 
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