But as I said, the clock rate of the shift register must be variable so
as to set the sine wave frequency. The way I see it, one generates, say,
an eight bit word constituting a full wave that is sent into the clocked
shift register that loops back to itself. The register is long, with
eight parallel-bit(8) output taps, each capable of reading the 8 bit
word in parallel, to be summed by a D to A converter to output an analog
sine voltage, which becomes the driver for that channel. The clock rate
for the looped shift register needs to be variable, so that your system
can set the frequency it needs.
---
For one degree increments, your shift register would have to be 9 bits
wide and 360 stages long, and would have to be loaded serially using a 9
X 256 lookup table and some glue logic to switch the serial inputs from
the LUT to the 360° tap on the shift register.
a simpler way might be: (View in Courier)
CLK>---[COUNT]--+-[LUT1]--[DAC]--[FILTER]--[OPAMP]--->OUT1
|
+-[LUT2]--[DAC]--[FILTER]--[OPAMP]--->OUT2
|
+-[LUT3]--[DAC]--[FILTER]--[OPAMP]--->OUT3
|
+-[LUT4]--[DAC]--[FILTER]--[OPAMP]--->OUT4
|
+-[LUT5]--[DAC]--[FILTER]--[OPAMP]--->OUT5
|
+-[LUT6]--[DAC]--[FILTER]--[OPAMP]--->OUT6
|
+-[LUT7]--[DAC]--[FILTER]--[OPAMP]--->OUT7
|
+-[LUT8]--[DAC]--[FILTER]--[OPAMP]--->OUT8
JF