Maker Pro
Maker Pro

Debouncing....at About 1Mhz

U

UltimatePatriot

There are some around her who haven't experienced either. You can
tell, because they are always on edge.


As if a total dolt like you could tell anything of the sort.
 
D

D from BC

D from BC [email protected] posted to sci.electronics.design:
On Sat, 10 Nov 2007 19:55:00 -0600, John Fields

On Sat, 10 Nov 2007 14:40:51 -0700, Jim Thompson

On Sat, 10 Nov 2007 11:42:31 -0800, John Larkin

On Sat, 10 Nov 2007 11:57:19 -0700, Jim Thompson

[snip]

Now please present us with your "solution" with component names
and values and I'll simulate it side-by-side with my design.


I rarely simulate. Design is the reverse of simulation. Design
forces the desired results, so why simulate?

[snip]

So you've been converted to the Bob Pease school of hand waving
?:)

My POV: Design puts the idea onto paper. Simulation proves that
what
is on the paper really works. But simulators don't "design". In
my business, simulation "proof" is required for each and every
process corner, otherwise the customer doesn't "buy".

---
I used to be in Larkin's corner, defending "build and test" over
"simulate", but after writing a few simulators to solve specific
problems posed here on sed, which couldn't be solved, practically,
any other way, I decided to lay down my wire-wrap gun until the
machine worked in the computer.

Then, along came wonderful, free LTSPICE.

I've designed stuff using it which I never had to physically build,
but which worked and which I got paid for, which is a joy.

A feeling I'm sure you enjoyed before I did. :)

An asynchronous circuit like this, and even moreso some of the
others that gave been posted, has internal delays and is subject to
all possible timings in the chatter zone. Spice can't really test
all the possible combinations of timings. You can generate a chatter
simulator, but you can't be sure its deterministic behavior
represents the real world of arbitrary timings. Complex async
circuits can have low-probability picosecond-wide windows of hazard.

John

I got inspired by that differentiator + schmitt invertor sketch of
yours.
The idea was to move the signal into the hysteresis levels.
I though I'd try doing the opposite..Moving the hystersis levels to
meet the signal..

Check out my hysteretic hairball! :O *
http://www.members.shaw.ca/chainsaw/SED/compsolution.jpg
569Kb

Notes:
* Top wave is the inverting input of U1.
(It's a cool waveform. 4 levels! :) )
* Prop delay is from a single device at less than 10nS.
* This can be a 1 chip solution with a fast dual comparator.
* I picked the LT1713 just because it's fast.
* The integrator + U2 could be replaced by some 'one shot' IC
solution * This circuit is not quite baked because I skipped on the
math and did best guesses on the resistor values.

With some tweaking, I think this might be a good circuit.

D from BC

I would say the idea is on target the the implementation is
excessively partsy. Simplify.

I might put it back in the oven for more cooking but I dunno yet...I
might switch meals :)


D from BC
 
S

Spehro Pefhany

On Sun, 11 Nov 2007 13:07:10 -0800, D from BC

On Sun, 11 Nov 2007 07:56:21 -0800, John Larkin

On Sun, 11 Nov 2007 01:32:07 -0800, D from BC

On Sat, 10 Nov 2007 19:35:26 -0800, John Larkin

On Sat, 10 Nov 2007 19:55:00 -0600, John Fields

On Sat, 10 Nov 2007 14:40:51 -0700, Jim Thompson

On Sat, 10 Nov 2007 11:42:31 -0800, John Larkin

On Sat, 10 Nov 2007 11:57:19 -0700, Jim Thompson

[snip]

Now please present us with your "solution" with component names and
values and I'll simulate it side-by-side with my design.


I rarely simulate. Design is the reverse of simulation. Design forces
the desired results, so why simulate?

[snip]

So you've been converted to the Bob Pease school of hand waving ?:)

My POV: Design puts the idea onto paper. Simulation proves that what
is on the paper really works. But simulators don't "design". In my
business, simulation "proof" is required for each and every process
corner, otherwise the customer doesn't "buy".

---
I used to be in Larkin's corner, defending "build and test" over
"simulate", but after writing a few simulators to solve specific
problems posed here on sed, which couldn't be solved, practically,
any other way, I decided to lay down my wire-wrap gun until the
machine worked in the computer.

Then, along came wonderful, free LTSPICE.

I've designed stuff using it which I never had to physically build,
but which worked and which I got paid for, which is a joy.

A feeling I'm sure you enjoyed before I did. :)

An asynchronous circuit like this, and even moreso some of the others
that gave been posted, has internal delays and is subject to all
possible timings in the chatter zone. Spice can't really test all the
possible combinations of timings. You can generate a chatter
simulator, but you can't be sure its deterministic behavior represents
the real world of arbitrary timings. Complex async circuits can have
low-probability picosecond-wide windows of hazard.

John

I got inspired by that differentiator + schmitt invertor sketch of
yours.
The idea was to move the signal into the hysteresis levels.
I though I'd try doing the opposite..Moving the hystersis levels to
meet the signal..

Check out my hysteretic hairball! :O *
http://www.members.shaw.ca/chainsaw/SED/compsolution.jpg
569Kb

Yeah, I was thinking along those lines. This is a "feed-beside" sort
of concept, a brutally fast forward path, with slower tweaks off to
the side to fix the low-speed defects. This was the concept Tek used
in their 7000 series oscilloscopes.

I was also thinking that the origical hysteresis idea was OK except
that the hyst band of cmos schmitts is poorly defined. That's fixable
by defining it better, namely by adding additional hysteresis. The
numbers ought to work.

John


Damn...that's right...This is freakn scope trigger tech... :p
I didn't notice.
Bummer... :( I'm reinventing the wheel again.

Now I'm wondering if I could have cheated and looked up oscilloscope
trigger circuit patents to dodge a whole lot of dinking with gates, D
ff's and one shots.
There should be ooodles of trigger art since the invention of the
oscilloscope.

What to do.....
Use time sifting through mountains of patents
versus
use time designing from scratch..

---
If it's for your own enlightenment, design from scratch. That way,
if you succeed, the thrill of discovery will be yours as much as it
was for whoever came up with it first, if you weren't.

And, if you fail, you will have, at least, fought the good fight.
:)

There's nothing quite so satisfying as building something yourself and
having it work... almost as good as an orgasm ;-)

Doesn't there have to be more than one person for politics to exist?


Best regards,
Spehro Pefhany
 
D

D from BC

D from BC [email protected] posted to sci.electronics.design:
On Sat, 10 Nov 2007 19:55:00 -0600, John Fields

On Sat, 10 Nov 2007 14:40:51 -0700, Jim Thompson

On Sat, 10 Nov 2007 11:42:31 -0800, John Larkin

On Sat, 10 Nov 2007 11:57:19 -0700, Jim Thompson

[snip]

Now please present us with your "solution" with component names
and values and I'll simulate it side-by-side with my design.


I rarely simulate. Design is the reverse of simulation. Design
forces the desired results, so why simulate?

[snip]

So you've been converted to the Bob Pease school of hand waving
?:)

My POV: Design puts the idea onto paper. Simulation proves that
what
is on the paper really works. But simulators don't "design". In
my business, simulation "proof" is required for each and every
process corner, otherwise the customer doesn't "buy".

---
I used to be in Larkin's corner, defending "build and test" over
"simulate", but after writing a few simulators to solve specific
problems posed here on sed, which couldn't be solved, practically,
any other way, I decided to lay down my wire-wrap gun until the
machine worked in the computer.

Then, along came wonderful, free LTSPICE.

I've designed stuff using it which I never had to physically build,
but which worked and which I got paid for, which is a joy.

A feeling I'm sure you enjoyed before I did. :)

It took me MANY years to trust simulators. Initially even bipolar
device models were bad.

But I still "design" by first "sketching", even if the "sketching"
does use a schematic capture program... I'm faster that way, no
erasing... drag stuff around... such fun!

Then I simulate.

...Jim Thompson

I still sketch for the tough problems.
That gives me the freedom to express the problem in any fashion.
If drawing cartoons of a little choo choo train stuck in a valley
helps to solve the circuit ... great! :)

Also, I think I can move my pen faster than a mouse.
D from BC

Yeah, but my pen (when using the tablet) can move a symbol or even a
group of symbols.

I've been so tempted to get a tablet.. I just don't like the prices I
see at the computer shops..
(Doh... I'm forgetting Eprey (Ebay) again.. :p )

Is it the trendy thing to have for electronics design nowadays?
D from BC
 
J

Jim Thompson

D from BC [email protected] posted to sci.electronics.design:
On Sun, 11 Nov 2007 08:29:44 -0700, Jim Thompson

On Sat, 10 Nov 2007 19:55:00 -0600, John Fields

On Sat, 10 Nov 2007 14:40:51 -0700, Jim Thompson

On Sat, 10 Nov 2007 11:42:31 -0800, John Larkin

On Sat, 10 Nov 2007 11:57:19 -0700, Jim Thompson

[snip]

Now please present us with your "solution" with component names
and values and I'll simulate it side-by-side with my design.


I rarely simulate. Design is the reverse of simulation. Design
forces the desired results, so why simulate?

[snip]

So you've been converted to the Bob Pease school of hand waving
?:)

My POV: Design puts the idea onto paper. Simulation proves that
what
is on the paper really works. But simulators don't "design". In
my business, simulation "proof" is required for each and every
process corner, otherwise the customer doesn't "buy".

---
I used to be in Larkin's corner, defending "build and test" over
"simulate", but after writing a few simulators to solve specific
problems posed here on sed, which couldn't be solved, practically,
any other way, I decided to lay down my wire-wrap gun until the
machine worked in the computer.

Then, along came wonderful, free LTSPICE.

I've designed stuff using it which I never had to physically build,
but which worked and which I got paid for, which is a joy.

A feeling I'm sure you enjoyed before I did. :)

It took me MANY years to trust simulators. Initially even bipolar
device models were bad.

But I still "design" by first "sketching", even if the "sketching"
does use a schematic capture program... I'm faster that way, no
erasing... drag stuff around... such fun!

Then I simulate.

...Jim Thompson

I still sketch for the tough problems.
That gives me the freedom to express the problem in any fashion.
If drawing cartoons of a little choo choo train stuck in a valley
helps to solve the circuit ... great! :)

Also, I think I can move my pen faster than a mouse.
D from BC

Yeah, but my pen (when using the tablet) can move a symbol or even a
group of symbols.

I've been so tempted to get a tablet.. I just don't like the prices I
see at the computer shops..
(Doh... I'm forgetting Eprey (Ebay) again.. :p )

Is it the trendy thing to have for electronics design nowadays?
D from BC

I designed the pen-to-tablet electronics for the Kurta (now Mutoh)
tablet. Though I was always impressed with the speed and accuracy we
attained I never really cared for tablets. Though I almost succumbed
to using a track ball many years ago.

...Jim Thompson
 
J

John Fields

On Sun, 11 Nov 2007 16:33:05 -0600, John Fields

On Sun, 11 Nov 2007 13:07:10 -0800, D from BC

On Sun, 11 Nov 2007 07:56:21 -0800, John Larkin

On Sun, 11 Nov 2007 01:32:07 -0800, D from BC

On Sat, 10 Nov 2007 19:35:26 -0800, John Larkin

On Sat, 10 Nov 2007 19:55:00 -0600, John Fields

On Sat, 10 Nov 2007 14:40:51 -0700, Jim Thompson

On Sat, 10 Nov 2007 11:42:31 -0800, John Larkin

On Sat, 10 Nov 2007 11:57:19 -0700, Jim Thompson

[snip]

Now please present us with your "solution" with component names and
values and I'll simulate it side-by-side with my design.


I rarely simulate. Design is the reverse of simulation. Design forces
the desired results, so why simulate?

[snip]

So you've been converted to the Bob Pease school of hand waving ?:)

My POV: Design puts the idea onto paper. Simulation proves that what
is on the paper really works. But simulators don't "design". In my
business, simulation "proof" is required for each and every process
corner, otherwise the customer doesn't "buy".

---
I used to be in Larkin's corner, defending "build and test" over
"simulate", but after writing a few simulators to solve specific
problems posed here on sed, which couldn't be solved, practically,
any other way, I decided to lay down my wire-wrap gun until the
machine worked in the computer.

Then, along came wonderful, free LTSPICE.

I've designed stuff using it which I never had to physically build,
but which worked and which I got paid for, which is a joy.

A feeling I'm sure you enjoyed before I did. :)

An asynchronous circuit like this, and even moreso some of the others
that gave been posted, has internal delays and is subject to all
possible timings in the chatter zone. Spice can't really test all the
possible combinations of timings. You can generate a chatter
simulator, but you can't be sure its deterministic behavior represents
the real world of arbitrary timings. Complex async circuits can have
low-probability picosecond-wide windows of hazard.

John

I got inspired by that differentiator + schmitt invertor sketch of
yours.
The idea was to move the signal into the hysteresis levels.
I though I'd try doing the opposite..Moving the hystersis levels to
meet the signal..

Check out my hysteretic hairball! :O *
http://www.members.shaw.ca/chainsaw/SED/compsolution.jpg
569Kb

Yeah, I was thinking along those lines. This is a "feed-beside" sort
of concept, a brutally fast forward path, with slower tweaks off to
the side to fix the low-speed defects. This was the concept Tek used
in their 7000 series oscilloscopes.

I was also thinking that the origical hysteresis idea was OK except
that the hyst band of cmos schmitts is poorly defined. That's fixable
by defining it better, namely by adding additional hysteresis. The
numbers ought to work.

John


Damn...that's right...This is freakn scope trigger tech... :p
I didn't notice.
Bummer... :( I'm reinventing the wheel again.

Now I'm wondering if I could have cheated and looked up oscilloscope
trigger circuit patents to dodge a whole lot of dinking with gates, D
ff's and one shots.
There should be ooodles of trigger art since the invention of the
oscilloscope.

What to do.....
Use time sifting through mountains of patents
versus
use time designing from scratch..

---
If it's for your own enlightenment, design from scratch. That way,
if you succeed, the thrill of discovery will be yours as much as it
was for whoever came up with it first, if you weren't.

And, if you fail, you will have, at least, fought the good fight.
:)

There's nothing quite so satisfying as building something yourself and
having it work... almost as good as an orgasm ;-)

Doesn't there have to be more than one person for politics to exist?
 
J

John Larkin

On Sat, 10 Nov 2007 17:44:09 -0800, John Larkin

On Sat, 10 Nov 2007 18:03:07 -0700, Jim Thompson

On Sat, 10 Nov 2007 16:19:54 -0800, John Larkin

[snip]

Your Sysreset sets Q high, but your sim starts with Q low. Why?

John


The default set-ups included FF initial conditions Q=0. If I uncheck
that box it starts, as would be expected, with Q=1.

...Jim Thompson

Well, run that. It's more interesting.

John

Yep. It takes one cycle for the output to be correct.

...Jim Thompson


It seems to work, but it's awfully convoluted. It would be, for me,
like one of those things that I designed but that I can barely
understand myself; there are too many possible states, and the dflop
clock sometimes comes from the input, and sometimes comes from the
input xored with the internal delay.

Think of the XOR as a device that is switched from being an inverter
to being a buffer. The switching does not occur while clock (input)
edges are present.

And the input can chatter, or it

Does nothing after the first transition... it's an edge-triggered
flop.

could be a single edge of either polarity. All those conditions have
to be proven to work, and proving it is too much work.

I avoid clever stuff like that, in hardware and in software. Sorry,
but I prefer my first circuit, because it's a lot easier to
understand.

John

When I feel confused I drinks a glass of wine ;-)

...Jim Thompson


One of the great engineering virtues is laziness. I consider a circuit
or a piece of code or a mechanism and say "that's going to be way too
much work" so I put it off for a while, or talk to somebody about it.
Usually something simpler emerges. Too many people, cursed with excess
energy, just plow ahead and implement the first idea they have. And
when it turns out to have bugs, as complex things will, they add stuff
to repair the bugs.

John


Must be what happened to you.

Gosh, where did you acquire such wit?

John
 
J

John Larkin

On Sat, 10 Nov 2007 11:57:19 -0700, Jim Thompson
[snip]

Now please present us with your "solution" with component names and
values and I'll simulate it side-by-side with my design.


I rarely simulate. Design is the reverse of simulation. Design forces
the desired results, so why simulate?
[snip]

So you've been converted to the Bob Pease school of hand waving ?:)

My POV: Design puts the idea onto paper. Simulation proves that what
is on the paper really works. But simulators don't "design". In my
business, simulation "proof" is required for each and every process
corner, otherwise the customer doesn't "buy".

---
I used to be in Larkin's corner, defending "build and test" over
"simulate", but after writing a few simulators to solve specific
problems posed here on sed, which couldn't be solved, practically,
any other way, I decided to lay down my wire-wrap gun until the
machine worked in the computer.

Perhaps I didn't make our procedures clear. We design, think, build,
test. "Build" means a full multilayer production item, not a
breadboard. "Test" means verify that everything works properly.

John
 
D

D from BC

But it still has an RC.

John

ok ok... there's an RC but it's just to make a one shot 'blip' to
capture the input steady state in the D ff.

I made this circuit because I was having difficulty with tau in the
original circuit.

Edge triggering should not depend on duty or repetition rate or
changes in duty or repetition rate.


D from BC
 
C

Charlie Edmondson

John said:
On Sun, 11 Nov 2007 08:25:59 -0700, Jim Thompson

[snip]

When I feel confused I drinks a glass of wine ;-)

...Jim Thompson


One of the great engineering virtues is laziness. I consider a circuit
or a piece of code or a mechanism and say "that's going to be way too
much work" so I put it off for a while, or talk to somebody about it.
Usually something simpler emerges. Too many people, cursed with excess
energy, just plow ahead and implement the first idea they have. And
when it turns out to have bugs, as complex things will, they add stuff
to repair the bugs.

John

I've been known to toss designs that I had been working for
weeks/months, because of too many "patches".

Panics the hell out of clients until they see the results of a clean
start.

...Jim Thompson



It takes guts to dump something you've put three months into. Even if
the new thing would be better and finished sooner. It's even more
difficult in a team design, where peer pressure exists. But yeah, I'll
consider dumping a design that's far along, even finished, when a
better or simpler idea pops up, or when the original starts creaking
of its own weight.

That's why it's better to not start too soon, to play with ideas for a
while at the start.

John
On a similiar subject...

A team I was working with was developing a vehicle classifier using an
overhead laser rangefinder and some other sensors. Their problem was
that the laser system was not very accurate or precise, it gave the
range to a vehicle with an 'error' of several inches. The laser system
had actually been developed just to detect presense, not range, and
range was just an unsupported feature.

So, the team went to work. Unfortunately, they were of the 'hacker'
level of software developers - lets write code, and figure out how to do
things later! So, after about four months, they had working code, but
it was of the consistency of spaghetti, having had four different
hackers working on it simultaneously.

So, the project team went to management and said "We now know how to do
it, and make good determinations. Let us have another month, and we can
start from scratch and build it right, from the ground up, and you will
have a system that will be much more stable and dependable.

Management told them to get off their duffs and start on the next
project, the system worked and that was all they needed, and that they
were behind schedule anyway.

Then they fired the head of R&D!

I transfered out to the field...

Charlie
 
J

John Larkin

ok ok... there's an RC but it's just to make a one shot 'blip' to
capture the input steady state in the D ff.

I made this circuit because I was having difficulty with tau in the
original circuit.

It needs an RC that doesn't transition to the cmos threshold in 100
ns, but mostly settles in 500. So maybe 250 would do it. Adding a
series inductor will help a lot, make it a bit closer to a true delay
and make the settling tail a lot nicer.

Edge triggering should not depend on duty or repetition rate or
changes in duty or repetition rate.

No, but it should be capable of meeting your specs.

John
 
J

John Larkin

John said:
On Sun, 11 Nov 2007 07:50:44 -0800, John Larkin


On Sun, 11 Nov 2007 08:25:59 -0700, Jim Thompson


[snip]

When I feel confused I drinks a glass of wine ;-)

...Jim Thompson


One of the great engineering virtues is laziness. I consider a circuit
or a piece of code or a mechanism and say "that's going to be way too
much work" so I put it off for a while, or talk to somebody about it.
Usually something simpler emerges. Too many people, cursed with excess
energy, just plow ahead and implement the first idea they have. And
when it turns out to have bugs, as complex things will, they add stuff
to repair the bugs.

John

I've been known to toss designs that I had been working for
weeks/months, because of too many "patches".

Panics the hell out of clients until they see the results of a clean
start.

...Jim Thompson



It takes guts to dump something you've put three months into. Even if
the new thing would be better and finished sooner. It's even more
difficult in a team design, where peer pressure exists. But yeah, I'll
consider dumping a design that's far along, even finished, when a
better or simpler idea pops up, or when the original starts creaking
of its own weight.

That's why it's better to not start too soon, to play with ideas for a
while at the start.

John
On a similiar subject...

A team I was working with was developing a vehicle classifier using an
overhead laser rangefinder and some other sensors. Their problem was
that the laser system was not very accurate or precise, it gave the
range to a vehicle with an 'error' of several inches. The laser system
had actually been developed just to detect presense, not range, and
range was just an unsupported feature.

So, the team went to work. Unfortunately, they were of the 'hacker'
level of software developers - lets write code, and figure out how to do
things later! So, after about four months, they had working code, but
it was of the consistency of spaghetti, having had four different
hackers working on it simultaneously.

So, the project team went to management and said "We now know how to do
it, and make good determinations. Let us have another month, and we can
start from scratch and build it right, from the ground up, and you will
have a system that will be much more stable and dependable.

Management told them to get off their duffs and start on the next
project, the system worked and that was all they needed, and that they
were behind schedule anyway.

Then they fired the head of R&D!

I transfered out to the field...

Charlie

Engineers should just say "no, it's not good enough, it's not ready,
and we won't release it until it is."

Really.

John
 
J

Jim Thompson

It needs an RC that doesn't transition to the cmos threshold in 100
ns, but mostly settles in 500. So maybe 250 would do it. Adding a
series inductor will help a lot, make it a bit closer to a true delay
and make the settling tail a lot nicer.



No, but it should be capable of meeting your specs.

John

My circuit is close to a true digital delay... play with it and
observe the snap-action/hysteresis.

...Jim Thompson
 
C

Charlie Edmondson

John said:
John said:
On Sun, 11 Nov 2007 09:05:43 -0700, Jim Thompson



On Sun, 11 Nov 2007 07:50:44 -0800, John Larkin



On Sun, 11 Nov 2007 08:25:59 -0700, Jim Thompson


[snip]


When I feel confused I drinks a glass of wine ;-)

...Jim Thompson


One of the great engineering virtues is laziness. I consider a circuit
or a piece of code or a mechanism and say "that's going to be way too
much work" so I put it off for a while, or talk to somebody about it.
Usually something simpler emerges. Too many people, cursed with excess
energy, just plow ahead and implement the first idea they have. And
when it turns out to have bugs, as complex things will, they add stuff
to repair the bugs.

John

I've been known to toss designs that I had been working for
weeks/months, because of too many "patches".

Panics the hell out of clients until they see the results of a clean
start.

...Jim Thompson



It takes guts to dump something you've put three months into. Even if
the new thing would be better and finished sooner. It's even more
difficult in a team design, where peer pressure exists. But yeah, I'll
consider dumping a design that's far along, even finished, when a
better or simpler idea pops up, or when the original starts creaking
of its own weight.

That's why it's better to not start too soon, to play with ideas for a
while at the start.

John

On a similiar subject...

A team I was working with was developing a vehicle classifier using an
overhead laser rangefinder and some other sensors. Their problem was
that the laser system was not very accurate or precise, it gave the
range to a vehicle with an 'error' of several inches. The laser system
had actually been developed just to detect presense, not range, and
range was just an unsupported feature.

So, the team went to work. Unfortunately, they were of the 'hacker'
level of software developers - lets write code, and figure out how to do
things later! So, after about four months, they had working code, but
it was of the consistency of spaghetti, having had four different
hackers working on it simultaneously.

So, the project team went to management and said "We now know how to do
it, and make good determinations. Let us have another month, and we can
start from scratch and build it right, from the ground up, and you will
have a system that will be much more stable and dependable.

Management told them to get off their duffs and start on the next
project, the system worked and that was all they needed, and that they
were behind schedule anyway.

Then they fired the head of R&D!

I transfered out to the field...

Charlie


Engineers should just say "no, it's not good enough, it's not ready,
and we won't release it until it is."

Really.

John
Yep, but then management always has the option of then firing the design
team, which in this case was a real threat. They instead just fired the
manager, and broke up the team.

Charlie
 
J

Jim Thompson

John Larkin wrote:
[snip]
Engineers should just say "no, it's not good enough, it's not ready,
and we won't release it until it is."

Really.

John
Yep, but then management always has the option of then firing the design
team, which in this case was a real threat. They instead just fired the
manager, and broke up the team.

Charlie

Most of the time I've had the luxury of being the "hired gun" and they
wanted ME to sign off on the project. Even happened once during the
Shuttle redesign. I dug in my heels and won the changes necessary.

...Jim Thompson
 
J

John Larkin

Yep, but then management always has the option of then firing the design
team, which in this case was a real threat. They instead just fired the
manager, and broke up the team.

Charlie

I have two reactions to that:

1. If they fired the team, the project would be delayed a lot more
than if they negotiated a cleanup/release plan that delivered a good
product. So they probably wouldn't fire them.

2. If I discovered that my management was such jerks, I'd quit before
they could fire me.

John
 
J

John Larkin

John Larkin wrote:
[snip]
Engineers should just say "no, it's not good enough, it's not ready,
and we won't release it until it is."

Really.

John
Yep, but then management always has the option of then firing the design
team, which in this case was a real threat. They instead just fired the
manager, and broke up the team.

Charlie

Most of the time I've had the luxury of being the "hired gun" and they
wanted ME to sign off on the project. Even happened once during the
Shuttle redesign. I dug in my heels and won the changes necessary.

...Jim Thompson


Yup, management is easy to manage. Just set it up so that if they
don't do what you want, success or failure will be their public
responsibility. That works miracles.

The function of management is to provide engineering with the
resources it needs to do good work, to do the admin scut work so we
can design.

John
 
D

D from BC

My circuit is close to a true digital delay... play with it and
observe the snap-action/hysteresis.

...Jim Thompson

Jim...are you referring to your circuit on
http://www.analog-innovations.com/SED/AlternatingEdge-Unobtanium.pdf
?
At present, it's my favorite design for now*..
(*Until I figure out JL's RC filter variants 'shoe fit's the foot'
designs.)

My solution on
http://www.members.shaw.ca/chainsaw/SED/compsolution.jpg
can use one 3.5nS comparator for an output edge delay of only 3.5nS.
This makes it one of the fastest/tightest solutions.
But I dunno...it's got a 'too good to be true' look to it..
I'm worried a built circuit might find a way to oscillate.
So..I'm dodging that pita analysis for now and will save it for the
next iteration.

For now.. Dff based designs look less stressful. :)


D from BC
 
J

Jim Thompson

On Tue, 13 Nov 2007 07:25:31 -0700, Jim Thompson
[snip]
My circuit is close to a true digital delay... play with it and
observe the snap-action/hysteresis.

...Jim Thompson

Jim...are you referring to your circuit on
http://www.analog-innovations.com/SED/AlternatingEdge-Unobtanium.pdf
Yes.

?
At present, it's my favorite design for now*..
(*Until I figure out JL's RC filter variants 'shoe fit's the foot'
designs.)

My solution on
http://www.members.shaw.ca/chainsaw/SED/compsolution.jpg
can use one 3.5nS comparator for an output edge delay of only 3.5nS.
This makes it one of the fastest/tightest solutions.
But I dunno...it's got a 'too good to be true' look to it..

Same here. Build it and see ;-)
I'm worried a built circuit might find a way to oscillate.
So..I'm dodging that pita analysis for now and will save it for the
next iteration.

For now.. Dff based designs look less stressful. :)


D from BC

Certainly ;-)

...Jim Thompson
 
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