Thanks.
My only thinking so far is that ADI DSP reference designs do not use
the best components, and the osc module for the ADC/DAC timing is
probably the most crucial part.
Thanks.
My only thinking so far is that ADI DSP reference designs do not use
the best components, and the osc module for the ADC/DAC timing is
probably the most crucial part.
Have you established a spec on the maximum jitter you wish to allow?
It would probably be good to translate that to a phase noise spec,
since crystal oscillators are commonly spec'd for phase noise
performance. ADI has some decent ap info on the effects of jitter...