There is no mention of "maximum input voltage" in this datasheet.
See note 5 on the book of page 3.
There is no mention of "maximum common mode voltage" in this datasheet.
See note 1 on page 3.
In this case the device allows the inputs to go pretty much from rail to rail, either separately or in combination. There are some devices in which the differential voltage should not exceed a far smaller figure. Likewise the are some devices where the common mode range is less than the full voltage range. In this case neither is the case. Sure it would be nice if it was mentioned more explicitly, but in a datasheet section dedicated to limitations, the lack of a limitation not bring reported is not so surprising.
It is more interesting what happens when the inputs are between Vcc-1.7V and Vcc.
Reading both datasheets (as far as I have so far) suggests this is an interesting region where the chip is safe, but...
Sometimes it is useful to read datasheets from different manufacturers to get a broader understanding.
so... given that Im expecting all versions of the LM324 to be the same
Well... No. You shouldn't expect that. Different manufacturers may have designed their own version of the chip. They design it to exhibit the same performance within the specified limits. Most of the time this produces cos that are completely compatible, but not always. There are some logic chips where different manufacturers have subtly different implementations. Whilst I can't think of an exact example of the top of my head, I was asked recently that the Schmitt trigger input on a clock pin was not universal across manufacturers.
I was under the impression that common mode for op amps was (V+ + V-)/2
Common mode is where the same signal appears on both inputs. The output should not be affected by this. The common mode range is the voltage range that you can tie both inputs together, and to any voltage in that range and not affect the output (a small differential signal should also appear unchanged on the output). Incidentally, the difference in this case between absolute maximum ratings and maximum ratings are that in the former you're protecting the chip, and in the later you're ensuring performance.
so is this saying that the inputs can go to +/- 32V no matter what, or only if the positive supply is at 32V?
The ST datasheet specifies a max (single ended) supply voltage of 30V. I would interpret this as allowing the inputs to go to Vcc + 2V. It might mean that even with a +3V Vcc you can take the inputs to +32V, but I strongly suspect that's not true. My general feeling is that I should assume the more conservative reading of something if I perceive ambiguity. I might be wrong, but I'll also be safe.
Reading the onsemi datasheet, it says "... but either or both inputs can go to +32V without damage, independent of the magnitude of Vcc".
That makes it clear. 32V above the most negative rail is always OK. This is very useful in case where the signal might be present at the inputs when the device is not power up.