Securing PCBs from pirates

[Winfield Hill]

keith wrote...

Selling the device, with enough details to show the operation will
protect it for *your* use, but it deosn't do anythign to otherwise
"protect" the widget.

I agree, your disclosure helps protect anyone who seeks to use the
idea against someone who manages to later get a patent on the idea.

...and that one-year "bar" is only for US patents. Be careful with that
"public disclosure" too. "Disclosure" includes "recieving commercial
value". If you've told a potential customer that you have a widget that
does "framis", even though you haven't told how it does "framis", the
clock has already started.

Yes, I argue that Luhan's concept of later patenting the idea is wrong.

 

[REng]

I am amazed by the number of helpful replies this post received. Thank
you.

We are thinking about this product, and though I cannot elaborate , the
real IP is the 'xxxx' that will be using the hardware (amplifier+dsp)
etc and we are going to go and patent the 'xxxx' and the methods of
using 'xxx'. In the end, electronic hardware will be duplicated by
others and is not the bread and butter of the product

 

[keith]

I am amazed by the number of helpful replies this post received. Thank
you.

We are thinking about this product, and though I cannot elaborate , the
real IP is the 'xxxx' that will be using the hardware (amplifier+dsp)
etc and we are going to go and patent the 'xxxx' and the methods of
using 'xxx'. In the end, electronic hardware will be duplicated by
others and is not the bread and butter of the product

Just remember, a patent is only as good as your lawyers and is only valid
until your money runs out.

 

[Erik Walthinsen]

Placing chips on both sides of the PCB can help to slow down the guy with
an X-ray machine. Adding a layer of squiggly traces to the PCB can also
help.

Just inadvertantly ran into a slick way of doing this. While designing
a (simple, through-hole) board in Eagle, I changed the top and bottom
copper pours to Hatched instead of Solid. If done on more than 2
layers, especially if you can get the hatching to misregister between
the layers (at least in my particular case they align perfectly), I
can't see how anyone could possibly derive a board layout via X-ray
without going utterly and irrevocably insane:

http://omegacs.net/~omega/misc/faderboard.png

- Omega
aka Erik Walthinsen

 

[Wouter van Ooijen]

Placing chips on both sides of the PCB can help to slow down the guy with

Just inadvertantly ran into a slick way of doing this.

But I guess there are various outfits that have a double bed-of-nails.
Put the PCB between the nails, press the button, and voila, a list of
electrically connected points. No doubt your potential
reverse-engineer will know where to find such a service.


Wouter van Ooijen

-- ------------------------------------
http://www.voti.nl
Webshop for PICs and other electronics
http://www.voti.nl/hvu
Teacher electronics and informatics

 

[Guy Macon]

Just inadvertantly ran into a slick way of doing this. While designing
a (simple, through-hole) board in Eagle, I changed the top and bottom
copper pours to Hatched instead of Solid. If done on more than 2
layers, especially if you can get the hatching to misregister between
the layers (at least in my particular case they align perfectly), I
can't see how anyone could possibly derive a board layout via X-ray
without going utterly and irrevocably insane:

http://omegacs.net/~omega/misc/faderboard.png

Interesting idea! Maybe you could rotate one of the two hatching
patterns by 45 degrees and make the spacing different.

 

[keith]

Interesting idea! Maybe you could rotate one of the two hatching
patterns by 45 degrees and make the spacing different.

Still doesn't beat a continutiy tester and a little time. These things
are simple to RE. A decade or so ago I had a high security crypto design.
The "secure processor" was wound in about a half-mile of wire, bridged to
detect intrusion, with environmental sensors and the whole nine yards.
There was no pretense of stopping anyone from copying the design, only the
data within. Physical designs are easy to copy.

OTOH, you might want to look at the Xilinx FPGA security. I'm not
convinced it's worth it, but that's an issue for each design.

 

[Tim Hubberstey]

On Wed, 23 Feb 2005 20:04:54 +0000, Guy Macon wrote:

Still doesn't beat a continutiy tester and a little time. These things
are simple to RE. A decade or so ago I had a high security crypto design.
The "secure processor" was wound in about a half-mile of wire, bridged to
detect intrusion, with environmental sensors and the whole nine yards.
There was no pretense of stopping anyone from copying the design, only the
data within. Physical designs are easy to copy.

If the board uses BGA packages and blind vias, you can have connections
that never see the light of day. The only way to use the continuity
check method on these boards is to strip the BGAs off first. Not a show
stopper, but it might discourage some pirates.

OTOH, you might want to look at the Xilinx FPGA security. I'm not
convinced it's worth it, but that's an issue for each design.

I used to work in the arcade video game industry and we were loosing
roughly 60% of our sales to piracy. We had a couple of complex
programmable parts on the boards that were there strictly as an
anti-piracy measure. If the secured Xilinx parts were available back
then, I guarantee we would have looked very seriously at them.

 

[Mike Harrison]

Still doesn't beat a continutiy tester and a little time. These things
are simple to RE. A decade or so ago I had a high security crypto design.
The "secure processor" was wound in about a half-mile of wire, bridged to
detect intrusion, with environmental sensors and the whole nine yards.
There was no pretense of stopping anyone from copying the design, only the
data within. Physical designs are easy to copy.

OTOH, you might want to look at the Xilinx FPGA security. I'm not
convinced it's worth it, but that's an issue for each design.

Xilinx CPLDs start at under a dollar.....
Maybe you could put some function in a very cheap micro - Atmel ATTiny11 is about 40 cents...

 

[Guy Macon]

If the board uses BGA packages and blind vias, you can have connections
that never see the light of day. The only way to use the continuity
check method on these boards is to strip the BGAs off first. Not a show
stopper, but it might discourage some pirates.

I would imagine that anyone who is willing to lay out a board, buy the
parts, install them and then to sell the result will not be bothered by
the slight extra amount of work it takes to remove a few BGAs.

 

[Tim Hubberstey]

I would imagine that anyone who is willing to lay out a board, buy the
parts, install them and then to sell the result will not be bothered by
the slight extra amount of work it takes to remove a few BGAs.

I agree, in general, but removing BGAs without trashing the blind vias
takes specialized equipment and *may* discourage some low-budget pirates.

If you're dealing with pirates with serious money to spend, even ASICs
will only delay them slightly. This is why I like "soft" solutions like
FPGAs. We used Actel parts because the FAE assured us that even
stripping layers from the die would not reveal which anti-fuses were
programmed. The Xilinx encrypted bitstream security sounds pretty secure
too and definitely warrants further investigation.

 

[Zak]

Still doesn't beat a continutiy tester and a little time. These things
are simple to RE.

Then, use capacitive coupling within the board to achieve 'things'. Fun
to trace



Thomas

 

[Ken Smith]

Then, use capacitive coupling within the board to achieve 'things'. Fun
to trace

Add some strip lines to do RF things and you may make progress.

There is a technology to embed some components within the PCB. You could
put some coupling capacitors within the substrate. This would slow them
down a little more.

You can also do inductive components as traces and clamp the cores onto
the PCB.

 

[Guy Macon]

Then, use capacitive coupling within the board to achieve 'things'. Fun
to trace

That *would* be difficult to reverse-engineer.