prav said:
Hi,
My system looks like this.
--------------
I2C1 | |I2C5
Master1 ----------| |---------- to chip 1
| |I2C6
| |---------- to chip 2
| |I2C7
| |---------- to chip 3
I2C2 | |I2C8
Master2 ----------|Black box |---------- to chip 4
| |
| |I2C9
I2C3 | |---------- to chip 5
Master3 ----------| |I2C10
| |---------- to chip 6
| |I2C11
| |---------- to chip 7
I2C4 | |I2C12
Master4 ----------| |---------- to chip 8
| |
--------------
The information conveyed from the master is which chip to write to,and
also the address of the register along with the configuration
information to be written to the selected chip.
All the 8 chips work in slave mode only and all have the same I2C
address(i.e the reason we are going for 8 I2C buses and all the 8
chips are the same which are video decoder chips need to configure hue
, bightness and saturation etc of the video decoder chips , this
information is provided from the 4 different master ** Video Fixed
point Digital signal processor**).
Now my question is wether the blackbox shown can be implemented using
discrete chips(I2Cswitches/I2C mux) OR is it really feasible to
implement the black box in an FPGA.
Any solution would be appreciated.
Thanks in advance,
Praveen
Unless there is something you aren't telling us, you can just hook the
chips up using a single two-wire bus; the masters will have to do
arbitration, but this is the kind of thing I2C is designed to do.
The I2C slaves are differentiated by setting a different address on
their address input lines. For example, the MCP23016 port expander from
microchip has 3 inputs that allow one to set the address it'll look for.
If I set it to 010 by tying the inputs to the proper voltages, for
example, it'll only accept commands on addresses 0100010 (7 bit
addressing).
The masters arbitrate by watching the output when the write data. If
another master is talking at the same time, one of their output bits is
going to be low when they stop driving it low. The winning master
doesn't even know it happened. Most hardware already does this. Doing it
in software is pretty easy too.
One issue with I2C is that the total capacitance on the bus must be less
than 400pF. The pullup resistors for the bus must be chosen so that the
bus comes up quickly enough. There are also schemes for increasing the
speed, which requires special hardware drivers.
The Phillips site has an I2C specification that describes the whole
thing, including fast transfer modes, and 10 bit addressing.
If you are determined to use a black box for some reason you can't tell
us, you can do this by with a microcontroller, FPGA, CPLD, etc. Using
discrete logic would be a nightmare. You would have to shift the address
bytes into a shift register, compare addresses, wait for the slave to be
free (since another master might already be using it), take control of
the proper bus, etc. However, since slaves can hold off masters
indefinitely, you could collect the address, hold off that master, write
the address out, and then simply open up a channel between them using an
analog switch.
--
Regards,
Robert Monsen
"Your Highness, I have no need of this hypothesis."
- Pierre Laplace (1749-1827), to Napoleon,
on why his works on celestial mechanics make no mention of God.