Genome said:
Try this one on for size...... OK, it's fiddled about with and it's current
mode control but it does something.
You'll need to join and then go to the Files section of
http://groups.yahoo.com/group/LTspice/
For the CMOS library and place it in the directory shown somewhere below.
Watch out for unintended line wrap.
I wouldn't claim it's 100% but, if it floats your boat, then I can put a few
words to it.
Ok, I got it running after a few fixes. Something strange happens when
you Europeans post these things. I had something looking like an
Angstrom symbol before the "u" characters in the inductors. Also, you
had the VDEM pulse source set to Ton=1m and the Period=1m, as well as
the sim time only 200u which didn't make for a very interesting first run.
Ok, so now I see a circuit from which I can definitely learn some things
even if I don't use it right away. It is from scratch, so I'd have to
build up the FET drivers. HIP4080 would do, but that's a lot of work
when I've got a working but crude SA60 circuit ready to go.
I like the current limiting. Well it's really more than that, since
it's current mode.
The only trouble is that I get considerable overshoot, about 40% on the
upswing, and then a long settling time. The swing back to zero rings
quite a bit. It is interesting how the step response is affected by
where the step is attempting to go. I have been observing these effects
for a while in my own circuit.
Perhaps I can use the PWM generator with dead time generation in the
future. That is pretty cool.
Here is what I am working with and planning to implement. It's
controller arrangement is basically right out of the Apex App note 33,
but the H-bridge is my concoction. I should try different implentations
of SPICEd PWM generation, as I'm not certain the B source comparator
provides the quickest sim times.
I'm presently attempting to figure out what frequency response to set
the voltage sense amp to. I have discovered that if the amp slew rate
limits, then the DC gain accuracy is bungled. Other than that, too slow
of a sense amp is also not good.
Another peculiar phenomenon is that at certain frequency response
settings of the sense amp, the voltage sense ripple interacts with the
PWM ramp to skip every other cycle, causing the output ripple to go way
up. Strange. Hopefully you will see that happen with the settings I'm
providing here:
---------------------------------------------------------------
Version 4
SHEET 1 1964 820
WIRE -1168 -144 -1248 -144
WIRE -1168 96 -1248 96
WIRE -1040 -144 -1088 -144
WIRE -1040 -112 -1040 -144
WIRE -1040 0 -1040 -32
WIRE -1040 96 -1088 96
WIRE -1040 128 -1040 96
WIRE -1040 240 -1040 208
WIRE -928 -144 -1040 -144
WIRE -928 -112 -928 -144
WIRE -928 0 -1040 0
WIRE -928 0 -928 -48
WIRE -928 16 -928 0
WIRE -928 96 -1040 96
WIRE -928 128 -928 96
WIRE -928 240 -1040 240
WIRE -928 240 -928 192
WIRE -928 256 -928 240
WIRE -864 -144 -928 -144
WIRE -864 96 -928 96
WIRE -752 96 -784 96
WIRE -752 144 -752 96
WIRE -752 256 -752 224
WIRE -720 -144 -784 -144
WIRE -720 -48 -720 -144
WIRE -720 64 -720 -48
WIRE -688 -48 -720 -48
WIRE -672 -144 -720 -144
WIRE -672 64 -720 64
WIRE -672 96 -752 96
WIRE -640 48 -640 16
WIRE -640 144 -640 112
WIRE -624 16 -640 16
WIRE -624 144 -640 144
WIRE -560 -144 -608 -144
WIRE -560 -48 -608 -48
WIRE -560 -48 -560 -144
WIRE -560 80 -608 80
WIRE -560 80 -560 -48
WIRE -528 -144 -560 -144
WIRE -400 192 -432 192
WIRE -400 304 -400 192
WIRE -400 416 -400 384
WIRE -384 80 -560 80
WIRE -368 192 -400 192
WIRE -288 80 -304 80
WIRE -288 80 -288 64
WIRE -208 64 -288 64
WIRE -208 80 -208 64
WIRE -208 192 -288 192
WIRE -208 192 -208 80
WIRE -176 256 -176 224
WIRE -144 -320 -144 -368
WIRE -144 -208 -144 -240
WIRE -144 80 -208 80
WIRE -144 192 -208 192
WIRE -144 224 -176 224
WIRE -112 176 -112 144
WIRE -112 272 -112 240
WIRE -96 144 -112 144
WIRE -96 272 -112 272
WIRE -16 -320 -16 -368
WIRE -16 -208 -16 -240
WIRE 16 80 -80 80
WIRE 16 208 -80 208
WIRE 16 208 16 80
WIRE 16 304 16 256
WIRE 16 416 16 384
WIRE 128 -320 128 -368
WIRE 128 -208 128 -240
WIRE 144 -368 128 -368
WIRE 208 208 16 208
WIRE 208 208 208 160
WIRE 208 256 16 256
WIRE 208 304 208 256
WIRE 224 160 208 160
WIRE 224 304 208 304
WIRE 368 208 208 208
WIRE 368 256 208 256
WIRE 400 -192 400 -368
WIRE 400 128 400 -192
WIRE 400 192 400 128
WIRE 400 336 400 272
WIRE 512 -112 512 -144
WIRE 512 80 512 48
WIRE 528 -192 400 -192
WIRE 528 -144 512 -144
WIRE 528 80 512 80
WIRE 528 128 400 128
WIRE 576 -208 576 -304
WIRE 576 -48 544 -48
WIRE 576 -48 576 -128
WIRE 576 64 576 -48
WIRE 576 192 576 144
WIRE 576 304 576 272
WIRE 576 336 576 304
WIRE 688 -48 576 -48
WIRE 688 0 688 -48
WIRE 688 128 688 80
WIRE 688 304 576 304
WIRE 688 304 688 192
WIRE 720 -48 688 -48
WIRE 832 -144 832 -192
WIRE 832 -48 800 -48
WIRE 832 -48 832 -144
WIRE 832 64 832 -48
WIRE 832 304 688 304
WIRE 832 304 832 128
WIRE 880 -144 832 -144
WIRE 880 -48 832 -48
WIRE 1008 -144 960 -144
WIRE 1008 -48 960 -48
WIRE 1136 -144 1072 -144
WIRE 1136 -144 1136 -192
WIRE 1136 -48 1088 -48
WIRE 1136 -48 1136 -144
WIRE 1136 64 1136 -48
WIRE 1136 304 832 304
WIRE 1136 304 1136 128
WIRE 1168 -48 1136 -48
WIRE 1280 -48 1248 -48
WIRE 1280 0 1280 -48
WIRE 1280 128 1280 80
WIRE 1280 304 1136 304
WIRE 1280 304 1280 192
WIRE 1392 -304 576 -304
WIRE 1392 -208 1392 -304
WIRE 1392 -48 1280 -48
WIRE 1392 -48 1392 -128
WIRE 1392 64 1392 -48
WIRE 1392 192 1392 144
WIRE 1392 304 1280 304
WIRE 1392 304 1392 272
WIRE 1424 -48 1392 -48
WIRE 1456 -144 1440 -144
WIRE 1456 -112 1456 -144
WIRE 1456 80 1440 80
WIRE 1456 80 1456 48
WIRE 1520 -368 400 -368
WIRE 1520 -192 1440 -192
WIRE 1520 -192 1520 -368
WIRE 1520 128 1440 128
WIRE 1520 128 1520 -192
WIRE 1616 -304 1392 -304
WIRE 1616 -304 1616 -336
WIRE 1616 -128 1616 -304
WIRE 1616 32 1616 -48
WIRE 1616 304 1392 304
WIRE 1616 304 1616 96
WIRE 1728 304 1616 304
WIRE 1728 336 1728 304
WIRE 1760 -64 1760 -144
WIRE 1760 96 1760 0
WIRE 1872 -304 1616 -304
WIRE 1872 -272 1872 -304
WIRE 1872 -144 1760 -144
WIRE 1872 -144 1872 -192
WIRE 1872 -64 1872 -144
WIRE 1872 96 1760 96
WIRE 1872 96 1872 16
WIRE 1872 304 1728 304
WIRE 1872 304 1872 96
FLAG 16 416 0
FLAG -144 -208 0
FLAG -16 -208 0
FLAG -144 -368 Vpos
FLAG -16 -368 Vneg
FLAG 224 304 C_neg
FLAG 224 160 C_pos
FLAG 576 336 0
FLAG 1728 336 0
FLAG 400 336 0
FLAG -400 416 0
FLAG -96 144 Vpos
FLAG -96 272 Vneg
FLAG 512 -112 0
FLAG 1456 48 0
FLAG 512 48 0
FLAG 1456 -112 0
FLAG 544 -48 Vo_p
FLAG 1424 -48 Vo_n
FLAG 832 -192 Vop
FLAG 1136 -192 Von
FLAG -176 256 0
FLAG -624 16 Vpos
FLAG -624 144 Vneg
FLAG -752 256 0
FLAG -928 256 0
FLAG -928 16 0
FLAG -1248 96 Vo_p
FLAG -1248 -144 Vo_n
FLAG -432 192 Vref
FLAG -528 -144 Vdiff
FLAG 128 -208 0
FLAG 144 -368 Vdelay
FLAG 1616 -336 Vs
SYMBOL voltage 16 288 R0
WINDOW 3 -110 185 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 42 60 Left 0
SYMATTR Value PULSE(5 10 0 4u 4u 1n 8u)
SYMATTR InstName Vramp
SYMBOL voltage -144 -336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V3
SYMATTR Value 15
SYMBOL voltage -16 -224 R180
WINDOW 0 24 104 Left 0
WINDOW 3 24 16 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V4
SYMATTR Value 15
SYMBOL bv 400 176 R0
WINDOW 3 -107 214 Left 0
WINDOW 0 46 55 Left 0
SYMATTR Value V=if( v(Vdelay), limit( {Cgain}*(v(C_pos)-v(C_neg)), -1, 1
), 0 )
SYMATTR InstName B1
SYMBOL cap 1600 32 R0
SYMATTR InstName C3
SYMATTR Value 1000
SYMBOL current 1872 16 R180
WINDOW 0 24 88 Left 0
WINDOW 3 24 0 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName I1
SYMATTR Value 10
SYMBOL zener 1776 0 R180
WINDOW 0 24 72 Left 0
WINDOW 3 -19 -121 Left 0
SYMATTR InstName D3
SYMATTR Value ZD1
SYMBOL res 1856 -288 R0
SYMATTR InstName R7
SYMATTR Value 0.02
SYMBOL res 1600 -144 R0
SYMATTR InstName R8
SYMATTR Value 0.03
SYMBOL res 560 176 R0
SYMATTR InstName R9
SYMATTR Value 0.001
SYMBOL res 1376 176 R0
SYMATTR InstName R10
SYMATTR Value 0.001
SYMBOL Opamps\\2pole -112 208 R0
SYMATTR InstName U1
SYMATTR Value2 Avol=100k GBW=10Meg Slew=10Meg
SYMBOL voltage -400 288 R0
WINDOW 3 -98 195 Left 0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
WINDOW 0 42 55 Left 0
SYMATTR Value PULSE(0 5 0 10n 10n 500u 1m)
SYMATTR InstName Vref1
SYMBOL sw 576 -112 M180
SYMATTR InstName S1
SYMBOL sw 1392 -224 M0
SYMATTR InstName S2
SYMBOL sw 1392 48 M0
SYMATTR InstName S3
SYMBOL sw 576 160 M180
SYMATTR InstName S4
SYMBOL ind 704 -32 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 5 56 VBottom 0
SYMATTR InstName L1
SYMATTR Value 22.5
SYMBOL ind 1152 -32 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 5 56 VBottom 0
SYMATTR InstName L2
SYMATTR Value 22.5
SYMBOL cap 816 64 R0
SYMATTR InstName C1
SYMATTR Value 7.2
SYMBOL cap 1120 64 R0
SYMATTR InstName C2
SYMATTR Value 7.2
SYMBOL ind 992 -32 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 5 56 VBottom 0
SYMATTR InstName L3
SYMATTR Value 250
SYMBOL res 864 -32 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R1
SYMATTR Value 2.5
SYMBOL res -400 96 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R2
SYMATTR Value 10k
SYMBOL res -384 208 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R3
SYMATTR Value 10k
SYMBOL Opamps\\2pole -640 80 R0
SYMATTR InstName U2
SYMATTR Value2 Avol=100k GBW=30Meg Slew=100Meg
SYMBOL res -704 -32 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R4
SYMATTR Value {Rdiff}
SYMBOL res -880 -128 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R5
SYMATTR Value {Rdiff}
SYMBOL res -880 112 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R6
SYMATTR Value {Rdiff}
SYMBOL res -768 128 R0
SYMATTR InstName R11
SYMATTR Value {Rdiff}
SYMBOL cap -672 -128 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName C5
SYMATTR Value {C2diff}
SYMBOL cap -944 -112 R0
SYMATTR InstName C6
SYMATTR Value {C1diff}
SYMBOL cap -944 128 R0
SYMATTR InstName C7
SYMATTR Value {C1diff}
SYMBOL res -1184 -128 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R12
SYMATTR Value {Rdiv1}
SYMBOL res -1184 112 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R13
SYMATTR Value {Rdiv1}
SYMBOL res -1056 -128 R0
SYMATTR InstName R14
SYMATTR Value {Rdiv2}
SYMBOL res -1056 112 R0
SYMATTR InstName R15
SYMATTR Value {Rdiv2}
SYMBOL voltage 128 -336 R0
WINDOW 123 0 0 Left 0
WINDOW 39 0 0 Left 0
SYMATTR InstName V1
SYMATTR Value PULSE(0 1 500n 5n)
SYMBOL cap -144 96 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName C4
SYMATTR Value 820p
SYMBOL res 864 -128 R270
WINDOW 0 32 56 VTop 0
WINDOW 3 0 56 VBottom 0
SYMATTR InstName R23
SYMATTR Value 2.5
SYMBOL cap 1008 -128 R270
WINDOW 0 32 32 VTop 0
WINDOW 3 0 32 VBottom 0
SYMATTR InstName C9
SYMATTR Value 40
SYMBOL res 672 -16 R0
SYMATTR InstName R16
SYMATTR Value 1
SYMBOL res 1264 -16 R0
SYMATTR InstName R17
SYMATTR Value 1
SYMBOL cap 672 128 R0
SYMATTR InstName C8
SYMATTR Value 100p
SYMBOL cap 1264 128 R0
SYMATTR InstName C10
SYMATTR Value 100p
TEXT 846 522 Left 0 !.tran 0 20m 0 100n
TEXT 320 424 Left 0 !.param Cgain=1E5
TEXT 1272 432 Left 0 !.model ZD1 D(Vrev={Vsupp} Ron=.001)
TEXT 1272 512 Left 0 !.model Df D(Vfwd=0.6 Ron=0.027)
TEXT 1144 560 Left 0 !.model SW SW(Ron=0.225 Roff=1e9 Vt=0 Vh=-0.9)
TEXT 1336 392 Left 0 !.param Vsupp=50
TEXT 856 472 Left 0 !;op
TEXT -960 -256 Left 0 ;Gain = 0.2*(Vo_p - Vo_n)
TEXT 1272 472 Left 0 !.model ZD2 D(Vrev=10 Ron=.001)
TEXT -1232 -560 Left 0 !.params Rdiff=100k fc2=62.5k ; choose op-amp
resistors and V sample amp's cutoff
TEXT -1232 -520 Left 0 !.params kf={fc2/0.102431} ; compute freq.
scaling factor ; constant is the cutoff in Hz of a 2-pole prototype cascade
TEXT -1232 -480 Left 0 !.params C1diff={1/(Ro*kf)} C2diff={1/(Rdiff*kf)}
TEXT -1232 -720 Left 0 !.params Gain=5 ; choose total gain from input
to output terminals
TEXT -1232 -680 Left 0 !.params d={1/Gain} ; d is the division ratio of
the V sample dividers which is also the gain of the V sample amp stage
TEXT -1232 -640 Left 0 !.params Ro=500 ; choose the Thev. resistance
driving the differential amp inputs
TEXT -1232 -600 Left 0 !.params Rdiv1={Ro/d} Rdiv2={Ro/(1-d)} ;
compute required divider resistors
---------------------------------------------------------------
Comments and pointers appreciated, even despite foul language and insults.
Good day!
--
_______________________________________________________________________
Christopher R. Carlen
Principal Laser/Optical Technologist
Sandia National Laboratories CA USA
[email protected]
NOTE, delete texts: "RemoveThis" and "BOGUS" from email address to reply.