Programmable frequency divier (counter with reload)

[litw]

I am designing a 8bit programmable frequency divider (8-255) in tsmc.35
which operates at ~1GHz. should i use asynchronous or synchronous
structure? Thanks!
litw

 

[Ken Smith]

I am designing a 8bit programmable frequency divider (8-255) in tsmc.35
which operates at ~1GHz. should i use asynchronous or synchronous
structure? Thanks!

Synchronous counters don't let the delays add up. Unless your flip-flops
have a delay under 0.125nS you need a synchronous counter.

You may still have trouble with the carry prop. times. Often you need to
add an extra flip-flop for a partial carry and another for the divided
output.

 

[litw]

Thanks Ken! I guess I'll try the synchronous. Problem is that I do not
have a fast JK ff yet. There's several approach to improve async
dividers in paper, but I am not sure how I'll implement their ideas.
Anyway. I am learning. Thank you.
litw

 

[Ken Smith]

Thanks Ken! I guess I'll try the synchronous. Problem is that I do not
have a fast JK ff yet. There's several approach to improve async
dividers in paper, but I am not sure how I'll implement their ideas.
Anyway. I am learning. Thank you.

Most of the async tricks only work with fixed divide ratios that can be
expressed as a product of small numbers.

 

[Allan Herriman]

I am designing a 8bit programmable frequency divider (8-255) in tsmc.35
which operates at ~1GHz. should i use asynchronous or synchronous
structure? Thanks!
litw

Don't forget to consider a multi-modulus prescaler, as described in
chapter 4 of this book:
http://www.national.com/appinfo/wireless/files/Deansbook3.pdf

Regards,
Allan.