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Pink noise generator circuit mod

KrisBlueNZ

Sadly passed away in 2015
Here's an updated schematic with the RF Solutions receiver and some other small additions. There's a lot of extra circuitry to deal with the signals from the manual switch (SWM) and the receiver, but it's really just one IC and a whole lot of resistors and capacitors. Here's a description for the new stuff.

UR generates a +5V regulated rail from the 15V rail coming from the pink noise generator board.

CNR is the connector for the RF Solutions RDF1 receiver board. Pins 18 and 19 configure the board for all momentary outputs. LEDL and SWP are used when "teaching" the receiver to respond to a particular remote control transmitter (see the RF Solutions documentation). Pins 17 and 16 are outputs 1 and 2 respectively; these pulse high then low when the corresponding transmitter button is pressed.

UL is a 74HC14 logic IC, called a "hex inverter with Schmitt trigger inputs". It is a 14-pin device with power and ground on pins 14 and 7, and contains six identical inverter gates, shown individually as triangles named ULA~ULF. Each gate has an input (the wide end) and an output, and it drives its output to the logically opposite state from its input. The Schmitt trigger inputs are mostly significant for ULB, see later.

ULE and ULD form a latch, that "sticks" in one state or the other unless changed by an input pulse. These pulses come through the five diodes that feed into the signals named "+ON" and "+OFF". A positive pulse on the anode of a diode is coupled through the diode and forces the latch into the corresponding state. When the output of the latch (on UL pin 8) is high, this forward-biases QC, which energises relay KC and starts the charging of CT via RR, which causes the noise at the output to ramp up.

Signals that trigger the latch into the ON or OFF state come from the radio receiver, from the manual control switch (via ULB and ULC), and from ULA which forces the latch OFF at power-up via the timing circuit formed by RS and CS. The first four latch trigger signals come from capacitor-resistor circuits that are (loosely) called differentiators.

Any logic signal that is passed through a capacitor then to a resistor to ground will produce a pulse when it changes state. When the incoming signal goes high, it produces a positive pulse at the output of the differentiator; when it goes low, it produces a negative pulse. The pulse duration depends on the time constant of the circuit, which is the product of the resistance and the capacitance (t = RC). (The pulse is not rectangular, it's shaped more like a saw tooth; the time constant is actually the time taken for the pulse to drop to 37% of its initial voltage.)

So a rising edge (transition from low to high) on one of the receiver's outputs is coupled through the capacitor and generates a short positive pulse at the top of the corresponding resistor, and this pulse passes through the diode and triggers the latch into the desired state.

SWM is the manual control switch. The voltage at RM is high when the switch is OFF, and low when it's ON. The 100K resistor and 10 nF capacitor filter out "switch bounce" and ULB buffers and inverts the signal. The gates in UL have Schmitt trigger inputs, which exhibit "hysteresis" and have two trigger voltages. When the input voltage is high and starts to fall, it must drop below the low-going threshold voltage before the gate's output goes high; once this happens, the output remains high until the input voltage exceeds the high-going threshold voltage, which is higher than the low-going threshold. This gives an automatic immunity to poorly defined input voltages between the two threshold voltages, which is important for "cleaning up" the poor-quality signal coming from the mechanical switch. (Mechanical switches produce a lot of noise for a very short time during switching, while the contacts rub and bounce against each other.)

When the switch is turned ON, ULB output goes high, coupling a pulse into the +ON input of the latch; when the switch is turned OFF, ULC output goes high, coupling a pulse into the +OFF input of the latch. The result is that every time the switch changes state, and every time a signal is received by the radio receiver, the latch is triggered into the desired state. Therefore the switch does not actually override the radio receiver; whichever one is operated most recently has priority.

LEDL is the illuminating LED inside SWM. It is driven from the collector of QC, almost in parallel with the relay coil.

I have highlighted the GND rail to make it easier to follow, since the diagram is starting to get messy.

Edit: I've just realised there's a minor simplification I can make to the way the manual switch circuit feeds the latch. I'll upload an updated schematic next time there is a significant change.
 

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KrisBlueNZ

Sadly passed away in 2015
Corrected schematic with a small change to the way the SWM circuit drives the latch - now the connection is through the +ON signal only, using two diodes. When the manual switch is turned ON, ULC output goes high and a positive pulse (transition from GND to VCC and back) is coupled into +ON; when the switch is turned OFF, ULC output goes low and a negative pulse (transition from VCC to GND and back) is coupled onto +ON by the second diode.

Also corrected the value of the resistor from SWM to the gate input, from 1K to 100K.
 

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Well after a few attempts at trying to get my head around it I am still stumped. Kris I appreciate all the effort you have put in and thanks for the explanation. I need to do some Wiki research to understand the role of the capacitors in the RF circuit as they are preventing current flow in my mind but there is something I am missing.

Edit: Its starting to make a bit more sense after some quick tuts online. I can see how it pulses now.
 
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Hi Kris,

Can you confirm I have the Pin numbers correct for the relay switch HE721A1200 as per attached schematic.
 

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Kris,

Here is the frequency spectrum for the PNG cuirciut in comparison to the op-amp circuit. Very little difference. I will try get a recording later.
 

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KrisBlueNZ

Sadly passed away in 2015
culomax and I have been working on this project via Skype. The circuit I designed earlier seems to work but there's a problem during the ramp-up - the noise starts up as spits and pops during the ramp-up. We haven't investigated this problem, because I had a better idea for how to do the ramp-up. Also the requirements have changed slightly in that a ramp-down is now needed. So I decided to redesign that part of the circuit.

The new design controls the volume of the white noise output from the shift register on the pink noise generator board. The volume-controlled white noise is then filtered by a set of R-C pairs that duplicate the filter on the pink noise generator board, and finally amplified and buffered by an op-amp and fed through a relay, which is now controlled from the same capacitor ("CT") that controls the signal amplitude.

Here's a description for the new design.

The top part of the circuit implements the on/off control from the manual switch ("SWM") and RF Solutions RDF1 receiver. It generates a control signal on the net marked "+ENABLE" which feeds into QD at the left of the bottom part of the circuit. You can test the bottom part of the circuit without the top part by connecting a switch between +ENABLE and +V.

The bottom part of the circuit does the ramp-up and ramp-down, relay control, volume control and signal amplification.

QC and QD control the charge and discharge of CT. When +ENABLE is high, QD pulls its collector to 0V which turns off QD and biases QC on. QC is connected as a constant current source which charges CT at a constant rate. DM and DL limit the maximum voltage on CT to a fixed value. When +ENABLE goes low, QD turns on and CT discharges through RD.

QJ and QK drive the relay based on the CT voltage. While the CT voltage exceeds about 0.7V the relay is turned ON. This controls the relay appropriately for both the ramp-up and the ramp-down.

QB buffers the CT voltage and introduces a drop of about 1.4V from its base to its emitter, so its emitter does not start to rise until after the relay has turned ON. Its output provides a DC supply called "VL" which determines the voltage swing on the collector of QW, the white noise buffer.

QW is driven directly from the digital white noise output of the Velleman K4301 board which is the output of gate N3 in IC1. QW's collector has digital white noise at an amplitude determined by VL, which is in turn controlled by the CT voltage.

This digital white noise is coupled into a filter circuit consisting of R4~10, C2 and C4~9 which duplicate the components in the K4301 board, and convert the white noise into pink noise at pin 3 of UA.

UA is wired as a non-inverting amplifier with its input on pin 3. Its operating voltage is set at about half the supply voltage by US, a supply splitter IC. Gain is adjustable via RG. The output is coupled to RZ which removes the DC offset so there is no click when the relay contacts close.

The output can be connected to the unbalanced input of the speaker amplifier and while the relay contacts are open the circuit will not interfere with any other source fed into the speaker amplifier input.

Edit: There's an error in the top part of that schematic. There are two ULDs. The gate connected to RS, DS and CS should be ULF with its input on pin 13 and output on pin 12.
 

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Kris,

Many thanks for updated schematic. I will put together a components list and see what additional components I need. Again, we will try get the volume control up and running and then add the RF control later.
 
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