Output of (voltage multiplier??) circuit

[nvjnj]

I have a question on voltage multiplier circuit, though that's what I think the circuit is...I'm not sure.
I'm expected to find the output waveform of the circuit diagram uploaded.



To do this, all I need is the equivalent circuits for both positive and negative half cycles, from which I can derive the output depending on capacitor effects. However, I cannot identify what diodes are forward/reverse biased in positive and negative cycles.

Could someone please help me identify which diodes are forward biased in the positive and negative ac input cycles respectively....(IDEAL behavior can be assumed for diodes and capacitors).

So far, I think....
Positive cycle: D4, D2
Negative cycle: D1, D3....are forward biased, but I'm not sure... Please help.

[Moderator note: I've edited this post, to reduce image from a 240 kB JPG to a 2 kB PNG file and include it in the body of the message -- KrisBlueNZ]

 

[duke37]

I think you are right. It can be looked on as two voltage doublers, one stacked on top of the other.

To get an idea of the output waveform, you will need information on the frequency, capacitor values and load. With no load, what will the waveform be?

 

[nvjnj]

I think you are right. It can be looked on as two voltage doublers, one stacked on top of the other.

To get an idea of the output waveform, you will need information on the frequency, capacitor values and load. With no load, what will the waveform be?

Load is not given, thanks for pointing that out...
I have a feeling D2 is forward biased in both cycles, am I correct??

-50Hz sine wave Vp=50V input supply,
-No capacitor values are given, exact waveform may not be expected, just level of multiplication(rectified by D4 and C4).

 

[KrisBlueNZ]

Start by labelling all the nodes. Then draw the waveform at each node, including the DC offset.

Nodes that are decoupled to 0V (the bottom line) with a capacitor can be assumed to be DC if there's no load, so you just need to calculate what voltage they will charge up to.

 

[nvjnj]

I have made a further attempt, please check it out.....

During the negative half cycle, diodes D1, D2, D3 are forward biased while D4 is reverse biased. Using the IDEAL diode model, the equivalent circuit is:



However, since D1-D2-D3 path is a non-resistive path, C1 and C3 are redundant and circuit simplifies as follows(please correct me if i am wrong since this looks like a grey area to me):



This charges up the C2 capacitor to supply voltage V with the polarity shown above.

During the positive half cycle, diodes D2 and D4 are forward biased, while others are reverse biased. Hence equivalent circuit is as follows:



SInce C1-C3 and C2-C4 branches are parallel, both will experience a voltage of V across its end. However, since C2 is charged to a potential of V as well, this will augment the source, and C4 will experience a charging voltage of 2V due to polarity of C2.(another gray area)

Hence, it can be concluded that in the negative half cycles, C2 charges to V while C4 discharges from 2V(charged by a previous cycle), while in the positive half cycles, C4 charges to 2V. And output will look like this :

 

[KrisBlueNZ]

I'm not sure what you're doing but I'm pretty sure it's wrong. You can't replace a diode with a capacitor.



I've identified all the nodes on your circuit. The rail along the bottom is common to the input and the output, so I've called it the 0V rail; all other voltages and signals are measured relative to it.

You can start by looking at which nodes are decoupled to 0V by capacitors. Since there is no load on the circuit, these capacitors will charge up but there is no way for them to discharge (since an ideal diode has no leakage current). Therefore the voltages on these nodes will reach a maximum and stabilise there. There are two of these nodes. Which ones are they?

Now, this circuit can be best understood by understanding the two types of circuits that it's made up from.



Here is the first quarter of the circuit. The waveform at A is the incoming AC voltage, which is centred on 0V, right? Now, when point A goes positive, D1 will be reverse-biased and no current will flow. But what happens when A goes negative? What will this do to the voltage across C1?

Can you work out what the waveform at point B will be, and add it to the diagram? Edit the drawing with Paint or Photoshop, to show the waveform at point B. Make sure you include the 0V line.


Now I've added the second quarter of the circuit. Given the signal at B, what will happen at C? Can you draw the signal at point C? Make sure you include the 0V line.

When you've got those signals right, you should be able to see how the second half of the circuit works.

 

[Arouse1973]

Good one Kris. This circuit looks a nightmare when you first see it. But with a logical approach it is quite straight forward.
Adam