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Oring of two Clocks

Hello i have two square wave oscillators, one is A: 200 khz and the other is B: 225 Khz, normally 200 khz is always present, but if the second source is switched on the output should be (B) 225 Khz, else it should be (A)
 
Are both oscillators switching between 0V and 5V?
How will you distinguish between an oscillator being in the 'logic 1' state and it being switched on? Is there some additional signal to indicate this?
Welcome to EP!
 
There is no additional signal to indicate, as soon as the second clock (B) is applied the second clock should come to output, if it is removed 1st (A) should continue, both are oscillating between 0 to 5 volt, it is two input single output,
if A is present (always present), output should be A, if B is connected, output should be B. if both A and B are connected output should be B.
 

Harald Kapp

Moderator
Moderator
With some analog magic:
upload_2016-5-4_7-32-48.png

The diode/capacitor/resistor filter detects the presence of the 2225kHz signal and controls the multiplexer built from the logic gates to let pass the 22kHz signal when present. If no 225kHz signal is present, the output of the filter is low, thus steering the multiplexer to let pass the 200kHz signal.
Note that due to the analog natire of the filter this circuit is sensitive to noise and variations in the frequency of the 225kHz signal.
 

hevans1944

Hop - AC8NS
You could perhaps apply B to a re-triggerable one-shot multivibrator that will disable A and enable B when B is present to trigger the one-shot. Use the one-shot Q and /Q outputs to enable two fwo-input NAND gates, with the Q output enabling B and the /Q output enabling A. Combine the two NAND gate outputs with a third two-input NAND gate. If B is NOT present, the /Q output will be high and will allow the third NAND gate to pass A. If B IS present, the Q output will be continuously high (because of re-triggering by B) and the third NAND gate will pass B.

upload_2016-5-4_2-18-19.png
Please excuse this messy diagram. I haven't learned how to edit out stuff yet. Also I didn't calculate the values for Rext and Cext to set the period of the one-shot. Its pulse duration should be slightly longer than the period of the B waveform to make sure it retriggers each cycle of B.
 
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With some analog magic:
View attachment 26618

The diode/capacitor/resistor filter detects the presence of the 2225kHz signal and controls the multiplexer built from the logic gates to let pass the 22kHz signal when present. If no 225kHz signal is present, the output of the filter is low, thus steering the multiplexer to let pass the 200kHz signal.
Note that due to the analog natire of the filter this circuit is sensitive to noise and variations in the frequency of the 225kHz signal.

Harald,
Your circuit takes into account that when the 225Khz stops it stops at "0".
Here is a modified version that doesn't care if it stops at "0" or "1".
In blue 225Khz is present ,in red it is missing.
untitled.JPG
 
You could perhaps apply B to a re-triggerable one-shot multivibrator that will disable A and enable B when B is present to trigger the one-shot. Use the one-shot Q and /Q outputs to enable two fwo-input NAND gates, with the Q output enabling B and the /Q output enabling A. Combine the two NAND gate outputs with a third two-input NAND gate. If B is NOT present, the /Q output will be high and will allow the third NAND gate to pass A. If B IS present, the Q output will be continuously high (because of re-triggering by B) and the third NAND gate will pass B.

View attachment 26620
Please excuse this messy diagram. I haven't learned how to edit out stuff yet. Also I didn't calculate the values for Rext and Cext to set the period of the one-shot. Its pulse duration should be slightly longer than the period of the B waveform to make sure it retriggers each cycle of B.
Yes,
a missing pulse application doable with a 555 as well.
 

hevans1944

Hop - AC8NS
With some analog magic ...
The re-triggerable one-shot circuit is analog magic too!

In my youth (age thirty or so) I eschewed one-shot multi-vibrators like the SN74123 because I perceived they weren't "truly digital" logic circuits. Fortunately, I soon got over it, which enabled me to also embrace the wonders of the NE555 for hybrid analog/digital circuit design. Some problem solutions appear to just require analog-generated time delays. The following is an example...

Years ago I had to interface a quadrature bi-directional rotary optical encoder to a precision lead-screw that, nevertheless, had some backlash. That means that even driving in the same direction, the rotary encoder would often move slightly in the opposite direction when starting and stopping. The problem was how to detect and count the pulses in either direction without losing any counts or gaining erroneous counts.

IIRC, this can be fairly easily done using flip-flops and logic gates to drive an up-down counter from the quadrature position pulses, but a problem occurs if the encoder stops briefly, immediately after an edge transition on one phase, and resumes motion in the opposite direction without a change in the other phase to indicate the new direction. This causes an erroneous additional count in the same direction as occurred before the actual change in direction. We could see this effect occurring while rotating the optical encoder back and forth by hand, observing the counts displayed on a commercial up/down counter display that was allegedly "quadrature ready" for up/down counting. With small motions we could get the counter to increment (or decrement) continuously in one direction even though the net rotation was zero!

I think this problem was finally resolved with one-shots triggered off the quadrature pulses, but the details escape me... The problem was apparently well-known, because twenty years after I solved the problem a company began selling a "signal conditioning board" to do the same thing.
 
I haven't been here for a long time, but here I am and I happened to notice this thread. I am wondering if a simple PLL would do the trick if detection time isn't an issue (eg the rc in the circuits above)? 225khz is in the range of the 567 (2 versions available at mouser around 60 cents). The lock output could enable a gate, switch a mux address etc. I also didn't see any mention of synchronous switching between the two clocks such as on a leading/trailing edge. Just curious.
 
I am wondering if a simple PLL would do the trick if detection time isn't an issue (eg the rc in the circuits above)? 225khz is in the range of the 567 (2 versions available at mouser around 60 cents). The lock output could enable a gate, switch a mux address etc. I also didn't see any mention of synchronous switching between the two clocks such as on a leading/trailing edge. Just curious.
If the two input frequencies are stable, the monostable circuit can be tuned to change over almost instantly when the 225 signal appears, and in 1.1 cycles when it disappears. No way a 567 can acquire or release that quickly.

ak
 
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@Hop: Essentially a digital version of my analog circuit. Your's is probably much less sensitive to noise than mine
Disagree. Yours has a DC input impedance of 100 ohms, and the transient impedance is even lower. 100 ohms is hard to drive on purpose, let alone by accident. Plus, the higher the source output impedance, the better the noise immunity. OTOH, the HC123 has a CMOS buffer between the input pin and the timing network, so the input impedance is multi-megohms regardless of network impedance. A sneeze in the next county can set it off. If the source can drive 100 ohms (and note that most TTL devices cannot), make mine analog.

ak
 
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