Op Amp Stability

[Arouse1973]

Arouse1973 submitted a new resource:

Op Amp Stability - Information and solutions to stability problems you can get with op-amps

Hi All It was mentioned that it might be use full for some people to understand a bit about some stability problems you can get with op-amps. Most of the seasoned engineers on here probably already know this and may like to make corrections to my post. I welcome constructive criticism and will take all on board and make any corrections needed. Hopefully this can turn in to a good resource for new engineers.

Op-amps are the building blocks of many circuits and have been used for many years....

Read more about this resource...

 

[(*steve*)]

That's great Adam.

I note you said you'd welcome feedback.

1. This does look like the start of something we could put into the tutorial section
2. It might be nice to add some figure numbers to your images for easier reference (I might do that just to make it easier for me to give you feedback. (done, I hope you don't mind)
   
3. You may not be able to edit your post after some time, that may pose some difficulties, but maybe we can figure something out...
4. In figure 3 it seems pretty clear which is the signal gain and which is the phase, but it may not be so clear for beginners. Perhaps you can add some words to describe this the first time. Also it might be useful to discuss why the phase isn't 180 degrees at the minimum frequency (as you might expect). I note you may have meant 800kHz (not 800Hz in the next paragraph)
5. In the first paragraph of the "Single pole response" section, it would be great to have the points you're talking about marked on the graph.
6. Jut under figure 4 you say "this is what happens when I add 100nF". It is not clear what "this" is, nor where you have added 100nF. Perhaps an updated diagram is needed?

I'll certainly have more feedback, but I'll stop there in case it is my understanding that is faulty (especially about the last point).

 

[Harald Kapp]

Nice post, go ahead with this.

May I suggest you attach the LTSPICE simulation files at the end of the post for the convenience of others who want to experiment with them? Also a link to the LTSPICE simulator homepage where they can download the simulator for free.

 

[Arouse1973]

Well Guys, your thanks inspire me to carry on. Steve or Harald please feel free to edit my post as you feel fit if you see any mistakes you can PM me if you want so I can update my master document at home. This took me along time in the evenings correlating simulation with real world. Sorry for the errors, most of this was done at 10 O'clock This is just the beginning!!!!!!!

Ian can you please look at the image limit on this post as I have two more solutions with images to finish of this section.
Thanks
Adam

 

[Ian]

Ian can you please look at the image limit on this post as I have two more solutions with images to finish of this section.
Thanks
Adam

No problem, I've doubled the limit .

 

[Arouse1973]

Thanks Ian. Works fine now.
Adam

 

[Arouse1973]

That's great Adam.

I note you said you'd welcome feedback.

1. This does look like the start of something we could put into the tutorial section
2. It might be nice to add some figure numbers to your images for easier reference (I might do that just to make it easier for me to give you feedback. (done, I hope you don't mind)
   
3. You may not be able to edit your post after some time, that may pose some difficulties, but maybe we can figure something out...
4. In figure 3 it seems pretty clear which is the signal gain and which is the phase, but it may not be so clear for beginners. Perhaps you can add some words to describe this the first time. Also it might be useful to discuss why the phase isn't 180 degrees at the minimum frequency (as you might expect). I note you may have meant 800kHz (not 800Hz in the next paragraph)
5. In the first paragraph of the "Single pole response" section, it would be great to have the points you're talking about marked on the graph.
6. Jut under figure 4 you say "this is what happens when I add 100nF". It is not clear what "this" is, nor where you have added 100nF. Perhaps an updated diagram is needed?

I'll certainly have more feedback, but I'll stop there in case it is my understanding that is faulty (especially about the last point).

All done apart from the picture edit. I am working on that.
Adam

 

[LvW]

Hi Adam,
since you have mentioned to welcome constructive criticism - I like to comment on two points:

1.) Quote: "It is high because you normally close the loop with feedback which stabilises the op-amp"

I think, such a statement can be misleading because it is the feedback that may cause the opamp to be instable. Without feedback each amplifier is stable.
Speaking about stability we always have to discriminate between DC stability (stability of the dc operating point) and dynamic stability (against oscillation, connected with the phase margin).

In short: Feedback improves DC stability and - at the same time - degrades the dynamic stability.
One should know that - applying intentionally negative feedback - each amplifier will turn into positive feedback for increasing frequencies. And the circuit is dynamically stable only if the loop gain for these frequencies is already below zero dB.
This automatically leads to my second comment:

2.) Quote: Loop gain is the (open loop gain *Beta) and is written as Aβ. This is important because if this product ever equals -1 which is -1∠–180 ˚phase shift the circuit could oscillate.
To avoid misunderstandings (in conjunctiuon with the oscillation condition) we should be aware that the above rule applies WITHOUT taking the sign inversion at the inv. opamp terminal into account. This is important because during simulation this sign inversion is considered - and, as a consequence, the loop phase starts at -180 deg and the phase margin must be determined at zero deg. (see the first graph you have provided).

In short: For my opinion, speaking about "loop gain" we always must include this sign inversion - otherwise we do not arrive at negative feedback (for lower frequencies, including dc).

 

[Arouse1973]

Hi Adam,
since you have mentioned to welcome constructive criticism - I like to comment on two points:

1.) Quote: "It is high because you normally close the loop with feedback which stabilises the op-amp"

I think, such a statement can be misleading because it is the feedback that may cause the opamp to be instable. Without feedback each amplifier is stable.
Speaking about stability we always have to discriminate between DC stability (stability of the dc operating point) and dynamic stability (against oscillation, connected with the phase margin).

In short: Feedback improves DC stability and - at the same time - degrades the dynamic stability.
One should know that - applying intentionally negative feedback - each amplifier will turn into positive feedback for increasing frequencies. And the circuit is dynamically stable only if the loop gain for these frequencies is already below zero dB.
This automatically leads to my second comment:

2.) Quote: Loop gain is the (open loop gain *Beta) and is written as Aβ. This is important because if this product ever equals -1 which is -1∠–180 ˚phase shift the circuit could oscillate.
To avoid misunderstandings (in conjunctiuon with the oscillation condition) we should be aware that the above rule applies WITHOUT taking the sign inversion at the inv. opamp terminal into account. This is important because during simulation this sign inversion is considered - and, as a consequence, the loop phase starts at -180 deg and the phase margin must be determined at zero deg. (see the first graph you have provided).

In short: For my opinion, speaking about "loop gain" we always must include this sign inversion - otherwise we do not arrive at negative feedback (for lower frequencies, including dc).

Thanks for the comment Lvw. I'll look at your comments later. Did you like the post anyway? You didn't say.
Adam

 

[Arouse1973]

If this is taken well then after opamps I plan to do some more over the coming year. These include transmitting IR over distance and calculating the correct power, LED angle etc. wirless power transfer. And the big one EMC. I will also encourage very very much for others, Steve, Harald, Dave ,Kris, Laplace, Lvw etc to contact me personally with inputs from their extensive experience and I will add their input if relevant to my post. I am really open to this.
Adam

 

[LvW]

Thanks for the comment Lvw. I'll look at your comments later. Did you like the post anyway? You didn't say.
Adam

Adam - please, give me one or two days more, OK?

 

[(*steve*)]

Wow, I go to sleep and all this stuff happens!

 

[LvW]

Hi Adam,
I am sorry but there a many comments/corrections from my side in addition to the two remarks I have posted already. And since you have asked for comments...
Well, here it comes:

1.) Main Parameters
* Beta: I think it would be useful to define the resistors R1 and R2 using a ref. to Fig. 5

* Acl: Use beta again (instead of B) - otherwise one can assume that there is a difference between B and beta.

* Noise gain: The noise gain is the gain which is applicable for all the signal sources WITHIN the opamp: Noise and offset voltage. It is true that the noise gain NG is identical to the non-inverting signal gain (but it is NOT responsible for stability properties. In this context, only the loop gain matters).

2.) Figures
* Fig. 6: What is the meaning of the curcve V(aol)*V(1/b). This is impossible because it gives a gain larger than Aol. I suppose, it was your goal to draw V(Aol)/V(1/beta)=V(Aol)*V(beta) ?
It is correct that the phase margin is to be determined at the point where „Aol and 1/beta meet“. However, as you can derive from Fig. 3, this happens app. at 100 kHz (draw a horizontal line at 1/beta=20dB). And because the phase at this frequency is app. 80 deg. we have for a gain of 20 dB a phase margin of app. 80 deg.
A phase margin larger than 90 deg (like 111 deg) is possible for excessive closed-loop gains only (see the phase response in your Fig. 3).

* Fig. 7 and Fig. 8:
The arrangement in Fig. 8 cannot give the correct results (and, in fact, it doesn´t). It is true that for measuring the loop gain we can place such an ac source within the loop - however, only between two nodes which are sufficiently decoupled (preferrably between opamp output and R3, or between opamp input and the common node of R3 and R4). This requirement can be derived from feedback theory (Middlebrook´s loop gain formulas). If the ac voltage source is placed as in your diagram another simulation with a current source would be necessary at the same place to correct the error (using a special formula to combine both simulation results)

* Following figures:
The correctness of all the following drawings (and the conclusions) suffers from the wrong placement of the ac source (see comment above).

Regards
LvW

 

[Arouse1973]

Thanks for the feedback. I'll go through your comments and let you know. I appreciate your comments. I'll re-check my connection. An Linear Tech engineer showed me this a while ago, I may have it wrong.
Adam

 

[Arouse1973]

LVW Said:
1.) Main Parameters
* Beta: I think it would be useful to define the resistors R1 and R2 using a ref. to Fig. 5
Done
LVW Said:
* Acl: Use beta again (instead of B) - otherwise one can assume that there is a difference between B and beta.
Yep, missed that one. I must have edited it online and couldn’t work out what beta symbol was. I have amended the symbol.
LVW Said:
* Noise gain: The noise gain is the gain which is applicable for all the signal sources WITHIN the opamp: Noise and offset voltage. It is true that the noise gain NG is identical to the non-inverting signal gain (but it is NOT responsible for stability properties. In this context, only the loop gain matters).
This is a thread for the stability of op-amps. Noise gain might not be important in all cases but it is worth noting that if you have a lot of capacitance on the input from say a cable then the noise gain will increase with frequency and this will cause ringing as it crosses the gain bandwidth slope too steeply. If you would like me to re-word it then let me know. But it is an important parameter and needs to be included. I will be covering this later in the thread.
LVW Said:
2.) Figures
* Fig. 6: What is the meaning of the curcve V(aol)*V(1/b). This is impossible because it gives a gain larger than Aol. I suppose, it was your goal to draw V(Aol)/V(1/beta)=V(Aol)*V(beta) ?
Well spotted. This is just the node label I gave whilst I was simulating another circuit. It should be Aol*Beta. I’ll make a note bellow the diagram.

LVW Said:
* Fig. 7 and Fig. 8:
The arrangement in Fig. 8 cannot give the correct results (and, in fact, it doesn´t). It is true that for measuring the loop gain we can place such an ac source within the loop - however, only between two nodes which are sufficiently decoupled (preferrably between opamp output and R3, or between opamp input and the common node of R3 and R4). This requirement can be derived from feedback theory (Middlebrook´s loop gain formulas). If the ac voltage source is placed as in your diagram another simulation with a current source would be necessary at the same place to correct the error (using a special formula to combine both simulation results)
Yes you’re correct sorry the mistake is my fault. I had in connected incorrectly. I must admit I thought this was quite high. I should have re-checked.I have then modified the wording for the other diagram to read 180˚-111˚=69˚
I will amend the drawings.

Thanks
Adam

 

[Arouse1973]

Hey Lvw
I am planing on making an excel spread sheet so that peaple can input the op amp parameters and get a phase margin with and without load capacitance and then when they apply say a resistor in series or a cap from output to input how does it change the phase margin. Maybe this is somthing you could do along side me. It would be good to have something to compare against. I have something rough already. But its going to be a while.But I hope it will be worth the wait. I have not found anything like this.
Adam

 

[LvW]

Hi Adam,
* Are you aware that Fig. 6 (and its evaluation) is still wrong ? The blue curve still exceeds the open-loop gain.
* Did you intentionally change the feedback network for Fig. 8 (1k feedback resistor) ? Now you compare the phase margins for two different circuits (gain of 20 dB and 0 dB).

Quote:" ...but it is worth noting that if you have a lot of capacitance on the input from say a cable then the noise gain will increase with frequency and this will cause ringing as it crosses the gain bandwidth slope too steeply. "
I am not quite sure if these assertions are really true. What is the source of these statements? How can input noise cause ringing ? It is the phase margin that will be affected by input capacitances (noise does not degrade stability).
LvW

 

[Arouse1973]

I'll have a look Lvw. You can PM me if you want and we can discuss, when we come to a suitable compromise then l will add this to the thread, saves clogging up this thread with message tennis.
Thanks Adam

 

[LvW]

I am not sure if it is a good suggestion to communicate via PM because other forum members should be able to participate, I think.
What kind of "compromise" are you speaking of (in case of right or wrong)?
Here are my simulation results for the phase margin (feedback via 10k-1k):
*Crossover frequency (unity loop gain) at Fco=71 kHz.
*Phase margin at Fc is PM=87 deg. (This PM also can be derived very easily from Your Fig. 3 at the 20 dB line).
I don´t know how you can arrive at other values.

 

[(*steve*)]

Yeah, for most stuff, just leave it in the thread. We can clean up all the other posts when it's complete (or move the article to a better home).

This is more a work in progress than a discussion thread, so we can remove stuff as it's addressed too. That's how I've handled the early stages of the LED tutorial and some other sticky posts.
Let me know when there's series of posts that can be removed.