I cant see it working, the OR input, fair enough, if any inputs go high then
theres a high output. On the output side, The inverted input Nor will always
end up as a high on U2D. It looks like it might work if 2 outputs such as D3
& D4 both go high, then the state of U2D would change. I've drawn out on
paper the states of the logic at each gate and I can't see that it would do
anything. ?
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The gates on the outputs aren't inverted ORs, they're DeMorgan
equivalent ANDs.
The ANDs are HC08's, the ORs are HC32''s, and the latch is an HC175.
Upon asserting RESET-, all the true (Q) outputs on the 175 will go low
and all the complementary (\Q) outputs will go high. The highs on the
complementary outputs will propagate through the ANDS and will enable
the clock input of the 175.
If any data inputs (DIN1 - DIN4) are high when RESET is released, the
clock input will have already gone high when RESET was asserted and
the outputs will remain in their RESET state until ALL the data inputs
go low, then ANY of the inputs goes high again. When that happens,
the corresponding 175 input will go high and the clock will go high
three gate delays later, propagating the inputs which went high prior
to one setup time through the 175 to its true outputs and latching
them. When any of the 175's true outputs go high its corresponding
complementary output will go low, that low will propagate through the
ANDs and, three gate delays later, will cause the 175's clock input
to go, and stay, low.
If the 175's inputs are low when the 175 comes out of reset, the true
outputs will be low, the complementary outputs will be high, and the
clock will also be low. In this case, the first high data input will
appear on the corresponding 175 input and, three gate delays later,
will cause the clock input to go high, clocking that high through the
175 and latching it.
Data must stay high for three gate delays plus one setup time plus one
hold time to be considered valid.
If you need something better/faster, I've posted a new schematic for
you on abse. let's move it over there OK?
The ANDs are HC08's, the ORs are HC32's, the flip-flops are HC74's,
and you can get all of their AC characteristics by looking at their
data sheets.