Maker Pro
Maker Pro

looking for new microcontroller

E

Erwin Elling

L.S.,

We are students at the University of Twente and we are doing a real-life
case for a Dutch company. This company would like us to come up with
newer (embedded) microcontrollers to replace the current ones used.

We are hoping to get any usable information of anyone here. Maybe someone
has done comparable investigations or maybe someone could give us a hint
to find more information. Below we will provide some information about
the current microcontrollers and the conditions for a new controller.

*Current controllers:
At the moment 8 and 16 bits microcontrollers, respectively the Philips
80552 (based on 8051) and the Philips XA, are used. These controllers
provide a realtime machine control with a maximum response time of about
0,1 mSec and about 2000 events per second.

One of the current trends is the increasing use of C++ on the 16 bits
controller, which demands a lot of processor capacity. Another important
thing is the increase of number of events in newer machines to more than
10000 per second.

*Conditions for a new controller:
We are trying to find a newer controller to cope with the trends
specified above and (as many as possible of) the conditions stated below:
- Suitable for use with C++ (particularly in the lineary address area
and with many data pointers);
- Availability of C++ cross-compilers and debug tools. E.g. GNU (no
front-end C++ compiler);
- Usable with a RTOS (at the moment in use: CMX);
- Many I/O on the chip:
o One or more I2c busses;
o Multiple external interrupt inputs;
o Two 8 or 10 bit AD converter/ DA converter or PWM .
- Preferably a small external bus, to avoid problems when routing
prints and EMC problems.
- Possibly internal FLASH (minimal 1Mbyte) and/or RAM (minimal 256K).
External is also acceptable. (at the moment in use: internal flash or OTP
to place a "loader"-programme on board and to load a flash or monitor-
programme);
- Cost-effective (maximum of about EUR20, to keep the price of the
machines competitive).

Maybe someone can help us a little.
Thanks in advance.

Kindest regards,
René Bloemberg and Erwin Elling
 
K

Ken Land

My company just went through such an exercise.

Our choice turned out to be an embedded "Soft Core" cpu running on an FPGA.

Before we had been using Motorola Coldfires.

Soft Core is hands down the greatest invention we've yet come across in
embedded development.

Your design typically requires some external logic often implemented in a
FPGA, so why not have just one chip?

Your design needs two processors instead of one? No problem just download
another CPU to the FPGA and go to it. Need another timer? ditto! DMA? no
problem, etc.

We're able to meet performance performance marks with the existing softcore,
but the manufacturer is already touting a newer version that is 2X-4X faster
on the same FPGA. So only a new download will be required to get a free new
faster CPU.

The dev tools are all open source GNUPro and you program/debug just like any
other embedded system.

We chose the Altera Nios processor. (www.altera.com)

This approach solves or mitigates a myriad of problems - routing, EMI,
BOM/Board costs, future proof adaptability.

Ken
 
K

Ken Lee

My company just went through such an exercise.

Our choice turned out to be an embedded "Soft Core" cpu running on an FPGA.

Before we had been using Motorola Coldfires.

Soft Core is hands down the greatest invention we've yet come across in
embedded development.

Your design typically requires some external logic often implemented in a
FPGA, so why not have just one chip?

Your design needs two processors instead of one? No problem just download
another CPU to the FPGA and go to it. Need another timer? ditto! DMA? no
problem, etc.

We're able to meet performance performance marks with the existing softcore,
but the manufacturer is already touting a newer version that is 2X-4X faster
on the same FPGA. So only a new download will be required to get a free new
faster CPU.

The dev tools are all open source GNUPro and you program/debug just like any
other embedded system.

We chose the Altera Nios processor. (www.altera.com)

This approach solves or mitigates a myriad of problems - routing, EMI,
BOM/Board costs, future proof adaptability.

Ken

That all sounds pretty interesting, but what are the costs when
compared to an off-the-shelf micro of similar features & performance?

Does your soft core solution provide a lower component cost compared
to the Coldfire?

I can see that the soft core approach provides you with much greater
flexibility but what's the ballpark NRE?

Also what's the cost of component testing -- with off-the-shelf micros
this was done by the manufacturer & so the cost is included in the
cost of the micro.

Ken.

<deleted text>

+====================================+
I hate junk email. Please direct any
genuine email to: kenlee at hotpop.com
 
K

Ken Land

Ken Lee said:
That all sounds pretty interesting, but what are the costs when
compared to an off-the-shelf micro of similar features & performance?

Does your soft core solution provide a lower component cost compared
to the Coldfire?

I can see that the soft core approach provides you with much greater
flexibility but what's the ballpark NRE?

Also what's the cost of component testing -- with off-the-shelf micros
this was done by the manufacturer & so the cost is included in the
cost of the micro.

Ken.

<deleted text>

+====================================+
I hate junk email. Please direct any
genuine email to: kenlee at hotpop.com

I can tell you that we are replacing all the functionality and performance
of a dual Coldfire 5206E system. (2 CF's, 4 Altera FPGA's, Various SRAM's
and FPM Ram's, 8 layer's 12"x9" - over 100 components)

The Nios/Cyclone board has one 12,000 LE Cyclone ($85) + one 4MB SDRAM.

The cost is about 20% of the old board. We have dual 32 bit NIOS processors
and most of our external logic in that one chip with plenty of room for
expansion and/or performance enhancement. The new board has fewer than 20
parts total.

The Devkit with a 20K LE board with everything you need is retail $995, but
if you attend a free seminar/class you get a deep discount.

One thing that is really cool is that the SOPC Builder (the wizard you use
to configure your CPU(s)) generates a SDK for your processor including
sample programs. So when I got the nerve to add my DMA engines, I was
pleasantly surprised with a hello_dma.c example. (!) Had dma going in
minutes.

Another engineer has built a small 3k LE system (Cyclone is $20) running a
16 bit NIOS. (You can clock these things from say 33MHz to over 100MHz. We
have our dual system running at 50MHz with plans to go to 70 or 80)

BTW, the SOPC builder includes a TCP/IP stack.

Ken
 
H

Hal Murray

That all sounds pretty interesting, but what are the costs when
compared to an off-the-shelf micro of similar features & performance?

One important consideration is that it's a lot easier to hire
programmers than FPGA geeks.

There is a lot of good discussion in comp.arch.fpga.

General consensus is that if you can do it with a micro
or DSP, that's probably cheaper/faster.

Also what's the cost of component testing -- with off-the-shelf micros
this was done by the manufacturer & so the cost is included in the
cost of the micro.

FPGAs are also tested at the factory. Just like CPUs and RAMs and
every other chip made today.
 
D

David Brown

Ken Land said:
My company just went through such an exercise.

Our choice turned out to be an embedded "Soft Core" cpu running on an FPGA.

Before we had been using Motorola Coldfires.

Soft Core is hands down the greatest invention we've yet come across in
embedded development.

Your design typically requires some external logic often implemented in a
FPGA, so why not have just one chip?

Your design needs two processors instead of one? No problem just download
another CPU to the FPGA and go to it. Need another timer? ditto! DMA? no
problem, etc.

We're able to meet performance performance marks with the existing softcore,
but the manufacturer is already touting a newer version that is 2X-4X faster
on the same FPGA. So only a new download will be required to get a free new
faster CPU.

The dev tools are all open source GNUPro and you program/debug just like any
other embedded system.

We chose the Altera Nios processor. (www.altera.com)

This is slightly tangental to the original topic, but why did you choose the
Altera Nios? We are expecting to use an fpga with a soft processor in the
near future, but haven't yet decided on the Nios or the Xilinx Microblaize.
I guess that you've more experiance with fpgas and soft processors than we
have (you couldn't have much less...) - could you say why you choose Nios?
 
F

Fred

David Brown said:
This is slightly tangental to the original topic, but why did you choose the
Altera Nios? We are expecting to use an fpga with a soft processor in the
near future, but haven't yet decided on the Nios or the Xilinx Microblaize.
I guess that you've more experiance with fpgas and soft processors than we
have (you couldn't have much less...) - could you say why you choose Nios?

I have to say my main issue is the up front cost of the Nios development
pack since it is me who pays for. Why they can't just bundle it away I
don't know. They would sell a lot more chips. I suppose you have to
remember Altera's roots in writing software and the chips came second place.
I'll have to take a look at Xilinx.
 
D

David Brown

Fred said:
in DMA?

I have to say my main issue is the up front cost of the Nios development
pack since it is me who pays for. Why they can't just bundle it away I
don't know. They would sell a lot more chips. I suppose you have to
remember Altera's roots in writing software and the chips came second place.
I'll have to take a look at Xilinx.

I think the prices are fairly similar with Xilinx. Both companies give free
tools for basic development, and charge for the more advanced tools
(including cores like their soft processor). The Nios development kit comes
with a pretty complete evaluation card - it is not unreasonably to think of
the price as covering the card with the Nios coming free, and it is not bad
value for money when viewed like that. I think Xilinx do something similar
too.
 
R

raymund hofmann

Ken Land said:
My company just went through such an exercise.

Our choice turned out to be an embedded "Soft Core" cpu running on an FPGA.

Before we had been using Motorola Coldfires.

Soft Core is hands down the greatest invention we've yet come across in
embedded development.

You sound far too enthusiastic about this "invention". Just remember, that the
logic of any (custom made) processor usually needs 10-20 times the transistors
in a FPGA and thus silicon area (cost). And the speed is also lower. If you have
a undemanding application and the extra cost you spend on a FPGA doesn't matter
it may work for you.
This is the Reason Triscend, Altera, Xilinx have come up with embedded
controller cores.
Your design typically requires some external logic often implemented in a
FPGA, so why not have just one chip?

The system on chip infatuation will clear up and some will notice that it may be
a solution for some specific applications as it always was.
Your design needs two processors instead of one? No problem just download
another CPU to the FPGA and go to it. Need another timer? ditto! DMA? no
problem, etc.

And then you not only have to use it, you'll have to design and test it ! Even
if you only glue together IP.
We're able to meet performance performance marks with the existing softcore,
but the manufacturer is already touting a newer version that is 2X-4X faster
on the same FPGA. So only a new download will be required to get a free new
faster CPU.

I doubt it will be that simple. NIOS is fixed on Altera FPGA's.
The dev tools are all open source GNUPro and you program/debug just like any
other embedded system.

Are the GNU NIOS Ports open source ?
We chose the Altera Nios processor. (www.altera.com)

This approach solves or mitigates a myriad of problems - routing, EMI,
BOM/Board costs, future proof adaptability.

And it indicates that your design is not cost sensitive. It also sounds you are
desinformed from the FPGA companies Marketing and have not made enough own
experience.

Raymund Hofmann
 
F

Fred

David Brown said:
than

I think the prices are fairly similar with Xilinx. Both companies give free
tools for basic development, and charge for the more advanced tools
(including cores like their soft processor). The Nios development kit comes
with a pretty complete evaluation card - it is not unreasonably to think of
the price as covering the card with the Nios coming free, and it is not bad
value for money when viewed like that. I think Xilinx do something similar
too.
At first glance the Xilinx development system, which at first sight seems
very similar to Altera's, is about 1/2 the price!
 
M

Michael Krämer

Erwin Elling said:
*Conditions for a new controller:
We are trying to find a newer controller to cope with the trends
specified above and (as many as possible of) the conditions stated below:
- Suitable for use with C++ (particularly in the lineary address area
and with many data pointers);
- Availability of C++ cross-compilers and debug tools. E.g. GNU (no
front-end C++ compiler);
- Usable with a RTOS (at the moment in use: CMX);
- Many I/O on the chip:
o One or more I2c busses;
o Multiple external interrupt inputs;
o Two 8 or 10 bit AD converter/ DA converter or PWM .
- Preferably a small external bus, to avoid problems when routing
prints and EMC problems.
- Possibly internal FLASH (minimal 1Mbyte) and/or RAM (minimal 256K).
External is also acceptable. (at the moment in use: internal flash or OTP
to place a "loader"-programme on board and to load a flash or monitor-
programme);
- Cost-effective (maximum of about EUR20, to keep the price of the
machines competitive).

Have a look into NEC's V850 product family. You will find an overview
of the devices at http://www.ee.nec.de/products/micro/03_v850/index.html.
Prices for single unit quantities start at about 5 Euro for the most
simple devices and reach about 20 Euro or a bit more for the higher
end ones with large on-chip memories. I think that all your
requirements are covered by some of the devices.

Michael
 
K

Kenneth Land

David Brown said:
This is slightly tangental to the original topic, but why did you choose the
Altera Nios? We are expecting to use an fpga with a soft processor in the
near future, but haven't yet decided on the Nios or the Xilinx Microblaize.
I guess that you've more experiance with fpgas and soft processors than we
have (you couldn't have much less...) - could you say why you choose Nios?

We chose Nios because it is dirt simple, configurable, and future proof.
Another guy posted how its easier to find software/firmware guys and that's
exactly what we are and one of the reasons we're so excited about it. It
moves the HW part of all this toward being a SW solution.

Nios with SOPC Builder and Quartus II is highly integrated and the many
examples get you going pretty far down the road. FPGA programming knowledge
would be a big help, but not any more than any other embedded project.

I've got a consultant that does the heavy duty FPGA work, but I'm finding
simple stuff is pretty simple. My coworker is software only and doesn't see
any difference to any other embedded SW project except when he needs another
timer/UART/DMA/etc. one magically shows up. (with example code in most
cases)

This extensibility and the fact that we'll be able to download new faster
versions of the CPU to old hardware makes the thought of going back to
hardcore cpu's unthinkable.

Ken
 
K

Kenneth Land

Fred said:
At first glance the Xilinx development system, which at first sight seems
very similar to Altera's, is about 1/2 the price!

If you look on Altera's site, you can find links to very cheap devkits.
(BTW, 1/2 price is not out of the question :) )

Ken
 
F

Fred

Kenneth Land said:
get processor away

If you look on Altera's site, you can find links to very cheap devkits.
(BTW, 1/2 price is not out of the question :) )

Ken
Perhaps I'm missing the point here but I thought the Nios core only came if
you purchased the development kit for $995, or possibly less 20%. The Nios
core is not "freeware". I'll have another look.
 
K

Ken Land

Fred said:
running
Perhaps I'm missing the point here but I thought the Nios core only came if
you purchased the development kit for $995, or possibly less 20%. The Nios
core is not "freeware". I'll have another look.

The Nios core is not freeware, but you get a 1 year subscription to any
upgrades and whatever version(s) you get during that year you can use for
life. Also, no royalities.
I don't know how else to buy it. I assume you can get it without buying a
devkit.

Ken
 
K

Ken Land

raymund hofmann said:
You sound far too enthusiastic about this "invention". Just remember, that the
logic of any (custom made) processor usually needs 10-20 times the transistors
in a FPGA and thus silicon area (cost). And the speed is also lower. If you have
a undemanding application and the extra cost you spend on a FPGA doesn't matter
it may work for you.
This is the Reason Triscend, Altera, Xilinx have come up with embedded
controller cores.

Our appliation is a color scanner so lots of image processing. 5-6 MSps
with varios processing and then compression and out the USB port. Like I
said we're replacing multiple Coldfire 5206e's plus multiple FPGA's with the
one Cyclone FPGA and getting roughly the same results. (ie much less chip
size, count, and cost)

If you/we need faster performance the clock rate can be bumped up to
supposedly 90-100 MHz which would double our performance. (5206e's were
toughted as 55 MIPS)
The system on chip infatuation will clear up and some will notice that it may be
a solution for some specific applications as it always was.


And then you not only have to use it, you'll have to design and test it ! Even
if you only glue together IP.

Who builds a system and doesn't test it? We're not the most stringent
engineers by any means and we test everything extensively.
I doubt it will be that simple. NIOS is fixed on Altera FPGA's.

I think you misread. We will get a new NIOS II soft core that will download
and run on our *existing* boards. We won't need new chips.
Are the GNU NIOS Ports open source ?

Yes, I have all the source that I dl'd from Altera's site. (although I
haven't built or modified any of it.)
And it indicates that your design is not cost sensitive. It also sounds you are
desinformed from the FPGA companies Marketing and have not made enough own
experience.

As I said our new board will be about 20% of the cost of our existing board.
So we are quite cost sensitive. We are also actually doing all of this so
the marketing hype is not an issue.

Ken
 
J

Jim Granville

Erwin said:
L.S.,

We are students at the University of Twente and we are doing a real-life
case for a Dutch company. This company would like us to come up with
newer (embedded) microcontrollers to replace the current ones used.

We are hoping to get any usable information of anyone here. Maybe someone
has done comparable investigations or maybe someone could give us a hint
to find more information. Below we will provide some information about
the current microcontrollers and the conditions for a new controller.

*Current controllers:
At the moment 8 and 16 bits microcontrollers, respectively the Philips
80552 (based on 8051) and the Philips XA, are used. These controllers
provide a realtime machine control with a maximum response time of about
0,1 mSec and about 2000 events per second.

One of the current trends is the increasing use of C++ on the 16 bits
controller, which demands a lot of processor capacity. Another important
thing is the increase of number of events in newer machines to more than
10000 per second.
<snip>

That's only a 5x increase ?
If you are used to, and using the 80C552, a good upgrade candidate for
this
is the new uPSD33xx family from STm

This has a turbo C52 core, 32KB RAM, 256KBF, 2 UARTS, PLD, ADC, and
JTAG
ISP and ISD....
Not sure how real they are, but your need does not sound urgent.

For higher Analog and Core performance, but less MAX RAM and FLASH,
look at the Cygnal family.

You can also use the Dallas 87C550, as a reasonable 80C552 upgrade, in
the near term.

-jg
 
K

Ken Lee

One important consideration is that it's a lot easier to hire
programmers than FPGA geeks.

There is a lot of good discussion in comp.arch.fpga.

General consensus is that if you can do it with a micro
or DSP, that's probably cheaper/faster.



FPGAs are also tested at the factory. Just like CPUs and RAMs and
every other chip made today.

I accept that there is verification of the design of the integrated
system, but would functional and/or performance testing of each FPGA
be required for each or batch of FPGA's? In software, the software
engineer would devise unit tests to test the structural integrity of
the code -- what does one do for FPGA designs?

With a CPU board using an off-the-shelf micro, the manufacturer has
tested the micro. Can one assume the same level of testing has been
performed on the libraries for a given FPGA?

I guess this is also a question regarding the correctness of the tools
and whether the simulator faithfully reflects the timing & behaviour
of the target system.

Ken.

[text deleted]

+====================================+
I hate junk email. Please direct any
genuine email to: kenlee at hotpop.com
 
Top