LM334 Iset/Ibias question

[Jon Kirwan]

I originally posted this in sci.electronics.basics, but perhaps should
have posted it here.

....

I recently looked at the general schematic for the LM334 on National's
datasheet and with a quick sweep of my arms came up with a design
Iset/Ibias of 8, not 16 as they show on page 5. I'm off by a factor
of two.

My logic went like this. 1/2 of the I from V+ flows via Q6 to the R
rail. 1/4 via Q4 and 1/4 via Q5. Q5's 1/4*I flows via Q1 to the R
rail, too. So now up to 3/4*I into the R rail. Q4's 1/4*I passes
through two paths. The Ic(Q2)=Ic(Q1)/2... but Ic(Q1)=1/4*I, so that
is 1/8*I, leaving the other 1/8*I for Q3's Vbe conduction, which also
flows to the R rail. So the R rail gets 7/8*I and the V- picks up
1/8*I. Multiplying through by 8 to get rid of the divisor, I see a
factor of 8 for Iset/Ibias... not 16.

Can someone do a quick description about how to arrive at something
more like 16 from the schematic? I'm missing a clue (or two.)

To be handy, here's the sheet:
http://www.national.com/ds/LM/LM134.pdf

Thanks in advance,
Jon

 

[Joerg]

I originally posted this in sci.electronics.basics, but perhaps should
have posted it here.

...

I recently looked at the general schematic for the LM334 on National's
datasheet and with a quick sweep of my arms came up with a design
Iset/Ibias of 8, not 16 as they show on page 5. I'm off by a factor
of two.

My logic went like this. 1/2 of the I from V+ flows via Q6 to the R
rail. 1/4 via Q4 and 1/4 via Q5. Q5's 1/4*I flows via Q1 to the R
rail, too. So now up to 3/4*I into the R rail. Q4's 1/4*I passes
through two paths. The Ic(Q2)=Ic(Q1)/2... but Ic(Q1)=1/4*I, so that
is 1/8*I, leaving the other 1/8*I for Q3's Vbe conduction, which also
flows to the R rail. So the R rail gets 7/8*I and the V- picks up
1/8*I. Multiplying through by 8 to get rid of the divisor, I see a
factor of 8 for Iset/Ibias... not 16.

Can someone do a quick description about how to arrive at something
more like 16 from the schematic? I'm missing a clue (or two.)

To be handy, here's the sheet:
http://www.national.com/ds/LM/LM134.pdf

They do not give any device geometries so you can't really calulate its
innards. What counts is the characteristics table on page 2 and that
says that the ratio is internally fixed at around 14-18, depending which
current range you are in.

 

[Jon Kirwan]

They do not give any device geometries so you can't really calulate its
innards. What counts is the characteristics table on page 2 and that
says that the ratio is internally fixed at around 14-18, depending which
current range you are in.

Okay. So that's the problem. I thought they might just add a few
more emitters to get that point across in the schematic, if they
wanted to. But I guess they don't do that.

Thanks,
Jon

 

[Joerg]

Okay. So that's the problem. I thought they might just add a few
more emitters to get that point across in the schematic, if they
wanted to. But I guess they don't do that.

Yeah, it's an over-simplified schematic, not much more than a sketch.
The next generations of chips are one step worse, no schematic :-(