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Help with De Morgan's theorem

I am looking for help with using De Morgan’s theorems for solving a circuit problem.

I learned about De Morgan’s theorems in classes about 35 years ago but have not used them since.

I now help run a garden railway as part of a Society of model engineers. I have written a programme for an Arduino that runs a section of the railway consisting of six track sensors and five sets of signals, the first four of which are four aspect, that is, red, yellow, double yellow and green, the fifth is three aspect, red yellow and green.

I have tried to work out how to run this with nand gates but I think a better understanding of De Morgan’s theorem would help.

If I say that track sensor 1 (TS1) is A, TS2 is B, TS3 is C, TS4 D, TS5 E, TS6 F,
Signal 1red G, sig 1 yellow H, sig 1 double yellow I, sig 1 green J,
sig 2 red K, sig 2 yellow L

and so on.

I will use lower case to indicate a NOT signal, i.e. a signal with a line over it.
Can I write :-
A = G
+ a . B = H . K
+ a . b . C = I . L . (sig3 red)
Etc

Am I asking the theorem to do too much or am I on the right lines?
 

Harald Kapp

Moderator
Moderator
Your job would be easier if you weren't limited to NAND gates. AS it is you need to first set up the logic equations in the way you have done in your example. You will then have to apply the DeMorgan theorem repeatedly, grouping terms in between until you arrive at a representation that includes only NAND gates.

Example (I'm using "/" to indicate negation):
A = B + C*D
= /B * /(C*D) (C and D already in a NAND form)
The term with B and with (C*D) are already AND connected. To create a NAND from the AND you need to invert it twice: AND = NOT(NAND):
A = /(/(/B*/(C*D)))
Using some substitution the use of only NAND gates becomes clearer:
/(C*D) = C NAND D = U (substituted)
-> A = /(/(/B*U)) = /(B NAND U)

The negation (single "/") for B and for (B NAND U) can be achieved by using a NAND gate with its inputs tied together since Y= A NAND A = /A

As a side note: This project is an ideal start for getting into microcontrollers. You can implement the logic for the signals easily with a few lines of code. Plus I'm sure expectances are high and more functions will be requested in the future. This is easily accommodated using a microcontroller, less so using dedictaed hardware.
For starters something like an arduino plus the required "shields"for sensing the tracks and for outputting the control signals to the signals would be suitable.
 
I am not limited to NAND gates but I seem to remember when you had finished using De Morgan’ s theorem you finished with a circuit containing NAND gates.Maybe I am wrong.

Are you using the + sign to indicate AND and the * sign to indicate OR? I seem to remember + being OR and . being AND.

I also seem to remember that you NOT’ed all the OR’s and then changed the AND’s to OR’s

As in A = B + C*D to A = /B * /(C*D) as you have done, am I correct?

I could use an arduino and in fact that is the method I have shown to the rest of the members but I would like to do it with IC’s if that is possible and perhaps get to grips with a little of De Morgans theorem again.
 

Harald Kapp

Moderator
Moderator
+ = OR
* = AND

You are right, the theorem per se is not limited to NAND or NOR gates, this limitation was in your original post:
I have tried to work out how to run this with nand gates

.
As in A = B + C*D to A = /B * /(C*D) as you have done, am I correct?
I made a mistake here:
A = B + C*D = /B * /(C*D) should be
A = B + C*D =/( /B * /(C*D))
sorry for that. That's it already using only NANDs
 
now I am even more confused.
I was thinking that the way to process the equation is to NOT all the AND's (or single expressions) as in
A = B + C * D to A = /B + /( C * D )
Then change all the OR's to AND's as in A = /B * /(C * D). So you finish up with
A = (NOT B) AND (NOT (C AND D)) this would use a two input NAND gate. (though C and D would have to be processed through an AND gate first)?
Your correction makes this wrong.
I am going to try to use this method to work out a set of 3 x 3 aspect lights with 4 track sensors.
A is TS1. B is TS2 C is TS3 D is TS4. Turning B on turns A off, Turning C on turns B off and turning D on turns C off.
sig 1 red is E. Sig 1 yellow is F. Sig 1 green is G. sig 2 red is H. Sig 2 yellow is I and so on.

E = A. F = (/A * B) H = B G(/A * /B) I = (/B * C)* J = (/B * /C)

I am beginning to wonder if I have over complicated a problem or if it gets more complicated if I have four aspects (which I have on my railway)? I will have to re consider my problem.
 
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... A is TS1. B is TS2 C is TS3 D is TS4. Turning B on turns A off, Turning C on turns B off and turning D on turns C off. ...
I don't quite understand how a track sensor is able to turn another track sensor ON or OFF.

Is this a combinational logic or a sequential logic problem? If it is combinational then you should generate a truth table. If it is sequential then you should generate a state diagram or next-state table. I seem unable to grasp the import of these Boolean expressions.
 
I didn't indicate that the TS's actually turn on their own latches, i.e. TS1 turns a latch on that TS2 turns off when it turns its own latch on, TS3 turns TS2's latch off when it turns its own latch on. While ever there is a train in-between track sensors the TS it passed is active.
I suppose it could be both sequential and combinational in that one train is sequential but when the first signal head has gone to yellow another train could flow down the series and would have to wait at signal 2 until that went yellow.
Am I right in saying that /(/A./B) as in Laplaces's third example would be a NAND gate with inverted inputs?
 
Here is a simple example of how to visually modify a logic circuit. The portion highlighted in red shows the substitution from AND gate with negated inputs to OR gate with negated output, as derived from DeMorgan using double negation. I believe the visual method is best to get from /(/A./B) to A+B but is essential for more complicated logic. Note: Graphic produced in Libre Office Draw application and equation editor.

Neg-NAND.png
 
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