Frame Detector Functional Specifications

[Aman]

Design a frame detector to detect a valid frame consists of three consecutive

frames each of 20 bits and with a “1010” bit pattern in the header parts.Cam someone hel me with the system verilog code for this

 

[(*steve*)]

How much of this have you already figured out and what but are you stuck on?

 

[Kattesravan]

Even i too need the code.Someone please send the code

 

[(*steve*)]

Same assignment eh?

 

[bertus]

Hello,

The both of you should show your works on what you have done upto now.
Perhaps some verilog tutorials might help:
https://search.yahoo.com/search?n=1...vm=i&fl=0&fr=altavista&p=verilog+tutorial&vs=
As for VHDL software have a look here:
https://www.staticfreesoft.com

Bertus