Need some experienced eyes to look over my complete design and let me know of any major or minor mistakes I have made.
Description: This circuit is supposed to be a trip alarm circuit. When the photocell goes dark(R7) the buzzer should sound for a predetermined amount of time and then the circuit should automatically reset itself.
I will need to add in an EXCLUSIVE-OR logic gate to the reset of the flip-flop to make sure I don't get a race condition when both SET/RESET are true. If SET is true, then RESET must always remain false and the timer should keep counting till SET is false.
I should probably have a resistor on the base of the transistor(Q1) to limit current.
The one question I have is how do I initially set MR to HIGH on power-up? The flip-flop outputs on power-up will be false/false. I was thinking I could add another logic gate, but the logic behind it is eluding me, anyone have a brilliant suggestion? Does it even matter, does the 4060 consume more power when counting or in reset mode?
Thanks goes out to steve and nick, without them I would be nowhere!!!
Description: This circuit is supposed to be a trip alarm circuit. When the photocell goes dark(R7) the buzzer should sound for a predetermined amount of time and then the circuit should automatically reset itself.
I will need to add in an EXCLUSIVE-OR logic gate to the reset of the flip-flop to make sure I don't get a race condition when both SET/RESET are true. If SET is true, then RESET must always remain false and the timer should keep counting till SET is false.
I should probably have a resistor on the base of the transistor(Q1) to limit current.
The one question I have is how do I initially set MR to HIGH on power-up? The flip-flop outputs on power-up will be false/false. I was thinking I could add another logic gate, but the logic behind it is eluding me, anyone have a brilliant suggestion? Does it even matter, does the 4060 consume more power when counting or in reset mode?
Thanks goes out to steve and nick, without them I would be nowhere!!!