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ESR Meter advise

Hello,

Some days ago I entered one post asking for help in one ESR plan I was doing, but thanks to your advise I have quited that plan, since it was very difficult to implement the way I was thinking in it.

So I have been googling to see if there is any circuit available to test ESR capacitors incircuit with 2 requirements:
  1. It must reject reactance working with one frequency of 100 KHz
  2. It must have the possibility to test if a low ESR is only that or if the cap is leaky.
So I found this circuit:

http://www.google.pt/url?sa=t&rct=j...VwtE7_fFATwswpsDD9J36vw&bvm=bv.80120444,d.d2s

I need some advise before going on:
  1. Does anyone can say to me what voltage will be at the leads with them open? (to see if I really can test incircuit)
  2. Whith one resistor of 10Ω connected to the test leads, what will be the voltage at the output of IC4.B?
  3. I have noticed that the decimal point on display is configured in a way that we will have only one decimal place (010.0). Instead of connecting pin 4 of IC6.B to pin 16 on display, if i'll connect it to the pin 12 of the display, Is it possible to regulate the voltage that I asked on point 2 using P1 to achieve the measure of 10.00?
I would also like to ask one general opinion about this circuit.

Thank you guys. All the help is welcome!
 

(*steve*)

¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd
Moderator
I really don't understand what your requirement (1) means, but this will probably do what you want.
 
Hello Steve,

Sorry for my late answer, but I've been busy this days...

In our last conversation in peak detecting troubleshooting for ESR meter post, Kris said something about esr meter being able to work with lower frequencies and being able to reject reactance, since my initial plan did not do it, it was only designed to reduce reactance for a low value than the lowest ESR value I was intended to measure. Since my first idea was to measure impedence and I want to follow Kris suggestion, when I've started to google for ESR meters plans, I rejected every plan that was measuring impedence with 100 KHz.

Since, in the text of this new plan the author claims it rejects reactance and since I'm not quite sure if this is what Kris thought, I came here with it for your's analyses.

The ESR meter you have mentioned, does in fact all the things I want in one ESR meter, but I really want to build one. Once again I thank you for your suggestion.

Greetings,
Rui
 

KrisBlueNZ

Sadly passed away in 2015
My comment was just that it should be possible to measure ESR independent of the apparent "resistance" due to reactance because the two are 90° out of phase with each other.

271416 schematic.png

This circuit applies a 100 kHz sinewave of 10V peak amplitude to a capacitor (ESR and C) in series with a current sense resistor, RS (1Ω). Running an LTSpice simulation of that circuit with four different values for ESR gives the following result:

271416 graph.png

The traces are:
  • Green: the applied sinewave
  • Blue: voltage across RS with ESR = 0Ω (actually 1 µΩ because LTSpice doesn't allow resistors to be exactly 0Ω)
  • Red: voltage across RS with ESR = 1Ω
  • Cyan: voltage across RS with ESR = 2Ω
  • Magenta: voltage across RS with ESR = 3Ω.
Of course you can repeat this simulation at any frequency you like.

You can calculate the ratio between ESR and capacitive reactance from the phase relationship between the applied voltage and the RS waveform, and you can calculate the total reactance+resistance from the amplitude relationship.

I'm not going to try to work out the formulas - I haven't done this stuff for a looong time. Harald or LvW could tell you without even breaking a sweat! Also I don't know the best way to measure the phase relationship. I'm just trying to show you the principle involved in distinguishing ESR from reactance.
 
Hello Kris,

Thank you very much for your answer.

This is a very clarifying post. I can see in it that diferent ESR values cause variations in the voltage phase as also. I thought that only amplitude would be affected with the increase of ESR, but just as you shown here in this data, once again I'm wrong! Thank you very much! (there is so much to learn...)

I think that the principle you say is correct, it makes sense.

I will try the circuit that I found and I will do some tests, who knows? Even if I get a little margin of error, for testing purposes it will be enough. In the future if I'll need precision measurements, the best thing will be to buy one really good ESR meter.

One more thing to all of you. I appologise you all if some times things are hard to read or understand. I assume it is my fault, because english is not my native language, some times probably I'm writing things that I think in portuguese but translated to english in the wrong manner. Anyway I thank you all for all the efforts and attention you are dedicating to this subject.

Best regards,
Rui
 
It might not effect what your doing but ESR is measured at 120Hz and its ripple current which is measured at 100KHz.
Thanks Adam
 

(*steve*)

¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd
Moderator
I think this is probably worth reading. Here is another explanation which ignores the inductive component (!) but models DF better. I wouldn't even bother with wikipedia :)

Practically speaking it is very difficult to separate ESR from ESL when measuring. Also, practically, we assume that the capacitor is net capacitive at the operating frequency and thus ESL just adds (a little) to the measured value of (and observed effects cause by) the ESR.
 
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