Differential-pair amplifer

[mike]

See the Steven M. Sandler and Charles E. Hymowitz article in the
May 2005 issue of Power Electronics Technology magazine. OK, I
know it's not out yet, but... In the meantime, try this link,
http://www.edacafe.com/technic al/papers/Mosfet_paper.php

Sandler's approach works well, after correcting his parameters.

Thanks, - Win

Win,

The article just showed up on PET.

It is in two parts. The first part is

SPICE Model Supports LDO Regulator Designs May 1, 2005

By Steven Sandler, Program Engineer, Acme Electric, Tempe, Ariz.

http://powerelectronics.com/mag/power_spice_model_supports/

The second part is

SPICE Model Supports LDO Regulator Design

Continuation of Article in Power Electronics Technology May 2005
By Steven M. Sandler and Charles E. Hymowitz

http://www.aeng.com/Articles/MosFet.asp

(Caution - huge images)

Mike Monett

P.S. Replying to a post in google groups beta is an experience you
do not want to experience more than once in your lifetime.

 

[Winfield Hill]

mike wrote...

The article just showed up on PET. It is in two parts. The
first part is

SPICE Model Supports LDO Regulator Designs May 1, 2005
By Steven Sandler, Program Engineer, Acme Electric, Tempe, Ariz.
http://powerelectronics.com/mag/power_spice_model_supports/

The second part is
SPICE Model Supports LDO Regulator Design
Continuation of Article in Power Electronics Technology May 2005
By Steven M. Sandler and Charles E. Hymowitz
http://www.aeng.com/Articles/MosFet.asp

Thanks, that's it. I found Sandler's technique easy to use, and
it worked better than a similar method I had developed (out of
desperation) using three to five series transistors.

 

[Mike Monett]

mike wrote...

Thanks, that's it. I found Sandler's technique easy to use, and
it worked better than a similar method I had developed (out of
desperation) using three to five series transistors.

Thanks,
- Win

Thanks, Win. Do you have any guidance on correcting Sandler's parameters
as mentioned above, or have you already discussed this in a different
thread?

Mike Monett

 

[Kevin Aylward]

mike wrote...

Thanks, that's it. I found Sandler's technique easy to use, and
it worked better than a similar method I had developed (out of
desperation) using three to five series transistors.

I have just had a look at this, and I am a little confused. Sandler
states "The results of the measurements were surprising, in that the
Mosfet does not fit the primitive element for the SPICE Mosfet model."

Its very, very well known that ro (1/gds) of the mosfet acts the same as
it does in bipolar, i.e. ro=Va/I, and spice models account for this.
Certainly Bsim3 does.

I was so taken a back by this statement and thread, having designed LDOs
at TI, that I just ran a few sims for sanity checks. Its like I am in a
different world here.

In SS, of course, one simply does a dc run with op enabled, and plots of
gds are available immediately.

So, spice models level 1, 2, 3 and BSim3.3 indeed all show the linear
increase in gds as current is increased, although BSim3.3 starts off a
little curved.

Whats going on here?

I looked at the AEI57230 mos .subckt. It has no value for lambda, so
obviously it will not produce a gds as function of current. If lambda is
zero, of course gds is always zero.

So, rather then building in extraneous circuits, simply set lambda.

What am I missing here? It seems to be the twilight zone.

Kevin Aylward
[email protected]
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.

 

[Winfield Hill]

Kevin Aylward wrote...

It's very, very well known that ro (1/gds) of the mosfet acts the same
as it does in bipolar, i.e. ro=Va/I, and spice models account for this.
Certainly Bsim3 does.

Two comments. Typical power mosfets follow an Id ~ e^((Vgs-Vth)/nVT)
relationship, rather than e^Vbe/VT that BJT transistors follow. The
factor "n" is typically 3 to 5. Can this factor "n" be accounted for
in the models? Second: Users are presented with a well-developed
manufacturer's model, too often a level 1 model, and just need to fix
the subthreshold region without unduly-disturbing the rest of the model.
Adding Sandler's source-current-programmed diode is a quick solution.

[ snip ] So, spice models level 1, 2, 3 and BSim3.3 indeed all show the
linear increase in gds as current is increased, although BSim3.3 starts
off a little curved.

They have the wrong slope. Dramatically so for level 1.

Whats going on here?

I looked at the AEI57230 mos .subckt. It has no value for lambda, so
obviously it will not produce a gds as function of current. If lambda is
zero, of course gds is always zero.

So, rather then building in extraneous circuits, simply set lambda.

LAMBDA? Isn't that the drain-voltage adjustment parameter for current
in the saturation region, Id = Isat / (1 - LAMBDA * Vds)? What's that
have to do with the subthreshold current?

 

[Kevin Aylward]

Kevin Aylward wrote...

Two comments. Typical power mosfets follow an Id ~ e^((Vgs-Vth)/nVT)
relationship, rather than e^Vbe/VT that BJT transistors follow. The
factor "n" is typically 3 to 5. Can this factor "n" be accounted for
in the models?

The BSim3 model has it all in the wash, so yes for that one. I'll have
to check for the other ones. Probably does for level 3.

Second: Users are presented with a well-developed
manufacturer's model, too often a level 1 model, and just need to fix
the subthreshold region without unduly-disturbing the rest of the
model.

Ahh... the word "subthreshold" is not actually mentioned in the paper.

Adding Sandler's source-current-programmed diode is a quick
solution.

[ snip ] So, spice models level 1, 2, 3 and BSim3.3 indeed all show
the linear increase in gds as current is increased, although BSim3.3
starts off a little curved.

They have the wrong slope. Dramatically so for level 1.

Ah... well, in subthreshold, yes. It would have helped if the paper
actually explained what it was trying to do.

LAMBDA? Isn't that the drain-voltage adjustment parameter for current
in the saturation region, Id = Isat / (1 - LAMBDA * Vds)?

Yes. It sets the output impedance.

What's that
have to do with the subthreshold current?

Oh? I am not talking about subthreshold current. Apparantly, you are.

I'll have a look at the models. I'll let you know what I rediscover

Kevin Aylward
[email protected]
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.

 

[Winfield Hill]

Kevin Aylward wrote...

Kevin Aylward wrote...

Two comments. Typical power mosfets follow an Id ~ e^((Vgs-Vth)/nVT)
relationship, rather than e^Vbe/VT that BJT transistors follow. The
factor "n" is typically 3 to 5. Can this factor "n" be accounted for
in the models?

The BSim3 model has it all in the wash, so yes for that one. I'll
have to check for the other ones. Probably does for level 3.

Second: Users are presented with a well-developed
manufacturer's model, too often a level 1 model, and just need to fix
the subthreshold region without unduly-disturbing the rest of the
model.

Ahh... the word "subthreshold" is not actually mentioned in the paper.

Adding Sandler's source-current-programmed diode is a quick solution.

[ snip ] So, spice models level 1, 2, 3 and BSim3.3 indeed all show
the linear increase in gds as current is increased, although BSim3.3
starts off a little curved.

They have the wrong slope. Dramatically so for level 1.

Ah... well, in subthreshold, yes. It would have helped if the paper
actually explained what it was trying to do.

Wrong language, poorly-written with respect to the subject perhaps,
but the right region (note the current range in figure 3), and the
right solution too, perhaps.

Yes. It sets the output impedance.

OK. That's wrong for our needs here, see below.

Oh? I am not talking about subthreshold current. Apparantly, you are.
I'll have a look at the models. I'll let you know what I rediscover

We (Sandler and myself) were both talking the subthreshold region, and
for a moment it seemed you were as well when you said, "the mosfet acts
the same as it does in bipolar..." Anyways, when using p-channel power
mosfets in linear low-drop-out-voltage regulators, and when selecting a
large FET to have good thermal conductance, one ends up working almost
entirely in the subthreshold region. Ditto other linear applications.
Most models completely miss the boat in this region, reporting out the
wrong slope (too much transconductance) and the wrong operating voltage.

 

[Winfield Hill]

Mike Monett wrote...

Thanks, Win. Do you have any guidance on correcting Sandler's
parameters as mentioned above, or have you already discussed this
in a different thread?

Measure the MOSFET over many decades of current and determine the
parameter "N" in the exponential equation (I use spreadsheet plots),
plug it into the diode model, then trial-and-error reduce the FET's
VTO term to match the current measured at a low value, like 100uA.
I also edit the model, removing Ciss to outside the new gate diode.

 

[Kevin Aylward]

Kevin Aylward wrote...

[ snip ] So, spice models level 1, 2, 3 and BSim3.3 indeed all show
the linear increase in gds as current is increased, although
BSim3.3 starts off a little curved.

They have the wrong slope. Dramatically so for level 1.

Ah... well, in subthreshold, yes. It would have helped if the paper
actually explained what it was trying to do.

Wrong language, poorly-written with respect to the subject perhaps,
but the right region (note the current range in figure 3), and the
right solution too, perhaps.

I did gloss over the fact that the current data was for a small range in
Vgs, and what that implied. The bit that threw me though was the words
of the "surprising" that data didn't fit the mosfet model, when the
model was a level one. Level 1 is the basic model that from the outset
ignores subthreshold, so it shouldn't be surprising that it fails to
model gds in that region. Level 1 has Id = 0 for Vgs < Vt, so I just
assumed one was discussing normal operation. Subthreshold is meaningless
for level 1.

For Level 2 and Level 3, one might be forgiven as to what the details of
the model are

We (Sandler and myself) were both talking the subthreshold region, and
for a moment it seemed you were as well when you said, "the mosfet
acts the same as it does in bipolar..." Anyways, when using
p-channel power mosfets in linear low-drop-out-voltage regulators,
and when selecting a large FET to have good thermal conductance, one
ends up working almost entirely in the subthreshold region. Ditto
other linear applications. Most models completely miss the boat in
this region, reporting out the wrong slope (too much
transconductance) and the wrong operating voltage.

I did a little Gds plot of level=2

http://www.anasoft.co.uk/Level2_Gds.gif

Where it can be seen that the are two basic slopes, with a rather
disconcerting discontinuity. around Vt. I think level 3 is better, but I
don't have an example to hand.

Kevin Aylward
[email protected]
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.

 

[Kevin Aylward]

Kevin Aylward wrote...

I noticed that the paper made some comment on the value of M in diode
models being restricted to 0.9. I checked on this, and there is a simple
check to reset the value if it is out of range. This wil be in any
unmodified Spice3/XSpice. I reckon all based on this do this.

I have now removed this checking in my XSpice engine and posted this
updated to my site.

It seems quite useful to allow diodes to be used as capacitors in
general, and I don't see any real reason for making an artificial
restriction on this. I also removed the checking on EG preventing it
from being set to below 0.1.

Kevin Aylward
[email protected]
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.

 

[Winfield Hill]

Kevin Aylward wrote...

I did a little Gds plot of level=2
http://www.anasoft.co.uk/Level2_Gds.gif

Where it can be seen that the are two basic slopes, with a rather
disconcerting discontinuity. around Vt. I think level 3 is better,
but I don't have an example to hand.

Whoa! Actually, I'll refine my remark, it isn't so much just the
subthreshold region one finds himself working in when using power
MOSFETs for linear applications, as it is the transition region in
which you found the discontinuity. Your painful plot is an example
of what one frequently encounters with manufacturer's models.

 

[Kevin Aylward]

Kevin Aylward wrote...


Whoa! Actually, I'll refine my remark, it isn't so much just the
subthreshold region one finds himself working in when using power
MOSFETs for linear applications, as it is the transition region in
which you found the discontinuity. Your painful plot is an example
of what one frequently encounters with manufacturer's models.

Indeed. Essentially, one needs to have a proper BSim3v3 model. Sometimes
I kludge one up from a nominal one. The BSim3 is very smooth. It starts
with a higher slope then moves into the lesser slope.

Its a little annoying that manufactures don't provide their BSim3
models, as they do have them. They characterise their process to the nth
degree.

Kevin Aylward
[email protected]
http://www.anasoft.co.uk
SuperSpice, a very affordable Mixed-Mode
Windows Simulator with Schematic Capture,
Waveform Display, FFT's and Filter Design.