KrisBlueNZ
Sadly passed away in 2015
Does the load, R2, need to connect to the negative rail?
As BobK said, if you're using an NPN, it's more usual to connect the load between the collector and the positive supply, and ground the emitter.
The way you've shown it uses the transistor as an emitter follower. In this configuration the transistor will drop around 0.7V.
If the load needs to connect to the negative supply, you should use a common emitter or common source stage with a PNP or P-channel MOSFET.
The connections for that configuration are: Transistor emitter, or MOSFET source, to positive supply rail. Transistor collector, or MOSFET drain, to positive side of load. Negative side of load to the 0V rail. Base or gate to the MCU output via a resistor. The transistor or MOSFET will conduct when the MCU output is LOW, not when it's HIGH. A pullup resistor between the base and emitter, or gate and source, is also a good idea.
So my recommendation would be a P-channel MOSFET, wired as just described. It should be a low-Vgs type, also called "logic level drive". These are more expensive than N-channel MOSFETs for the same level of performance, and there are less options available in through-hole. This one might be suitable: http://www.digikey.com/product-detail/en/NDP6020P/NDP6020P-ND/1055922. If you can deal with SMT, you have a lot more options. Also, if you don't need your load to be referenced to the 0V rail, you can use an N-channel MOSFET as I suggested earlier.
With the P-channel MOSFET arrangement, you also have to consider the voltage difference between the MCU's supply voltage and the load's supply voltage. The MCU's output will be 0V/+5V relative to the commoned 0V rail, but the MOSFET is controlled by the voltage on its gate relative to the source. So if the source voltage is not 5V then the MOSFET will not see 0V gate-source voltage when the MCU output is high.
Explain more about your project and the reasons behind the design decisions you have made so far.
As BobK said, if you're using an NPN, it's more usual to connect the load between the collector and the positive supply, and ground the emitter.
The way you've shown it uses the transistor as an emitter follower. In this configuration the transistor will drop around 0.7V.
If the load needs to connect to the negative supply, you should use a common emitter or common source stage with a PNP or P-channel MOSFET.
The connections for that configuration are: Transistor emitter, or MOSFET source, to positive supply rail. Transistor collector, or MOSFET drain, to positive side of load. Negative side of load to the 0V rail. Base or gate to the MCU output via a resistor. The transistor or MOSFET will conduct when the MCU output is LOW, not when it's HIGH. A pullup resistor between the base and emitter, or gate and source, is also a good idea.
So my recommendation would be a P-channel MOSFET, wired as just described. It should be a low-Vgs type, also called "logic level drive". These are more expensive than N-channel MOSFETs for the same level of performance, and there are less options available in through-hole. This one might be suitable: http://www.digikey.com/product-detail/en/NDP6020P/NDP6020P-ND/1055922. If you can deal with SMT, you have a lot more options. Also, if you don't need your load to be referenced to the 0V rail, you can use an N-channel MOSFET as I suggested earlier.
With the P-channel MOSFET arrangement, you also have to consider the voltage difference between the MCU's supply voltage and the load's supply voltage. The MCU's output will be 0V/+5V relative to the commoned 0V rail, but the MOSFET is controlled by the voltage on its gate relative to the source. So if the source voltage is not 5V then the MOSFET will not see 0V gate-source voltage when the MCU output is high.
Explain more about your project and the reasons behind the design decisions you have made so far.