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A Little Delayed in Starting

I rebooked at the schematic. I don't think the order of the connections matters. That was going to be my working assumption.
 
I sort of had a n idea as to their role, but the article made it clearer. However, my question is about whether the positive leads from both capacitors can be connected to the 5v pin at thr same time, ofr whether they need to be done in a certain. order (ie:the positive leads from the 0.1uF cap first and then and the 100uF cap_)

Maybe the article answered that question, but it escapes me. Are you saying that because they serve the decoupling purpose, that they have to individually run to the 5v pin?
It should not matter too much, as they are in parallel. it leverages the traits of specific types of caps. the 100 holds a charge while the .1 shunts spikes to ground
 
PDistblk.jpg
This is where I am at with mine.
The power distribution block.
Using a 5V linear regulator and the MAX1044 charge pump,
Input 9V via barrel plug ...
Outputs -9, 0, 4. 5, 5, 9 and 18V
-9, 4.5 and 18 taps will service the analog TL072 based input and output buffers. With 13.5+/- to operate in, it will have plenty of clean headroom and ample capacity for boost similar to the fabled Klon Centaur.
0 and 5V taps will serve the digital segment consisting of course, of PT2399's and eventually a PIC16F functioning as the nerve center at some point in development ... not this week however.
The remaining 9V tap will likely be omitted in this project.
Bench tested and confirmed operational.
 
I am simply following the diagram/schematic I referenced.

I am at the stage where I am connecting pins 16-9 on the right side of the chip.

I have a question:

There are certain connections that go to an analogue ground and others go top a digital ground.

I usually set up a row of pins that act as the ground for a circuit. How do I deal with having a digital and analog ground? Can all those connections run to the ground pins I established? Or is there another way of dealing with these two grounds?

Thank-you
 

bertus

Moderator
Hello,

Did you look at the Peter Vis basic echo page?
There you will se a red line in the schematic as optional connection between analog and digital ground:
basic-echo-circuit.gif
Bertus
 
Analog and digital grounds are often tied together in many designs.
In my approach, I'm just taking into account a few undocumented discoveries about these chips as well as a few other refinements.
the use of an input buffer, by way of a TL072, strengthens the signal to ensure it wont sink as I explore options along the way. Another reason for this is to give the signal a touch of gain to better utilize the resolution of the ADC. Being CMOS, a direct approach will probably be fine and a buffer can be added later after the delay block is established.
Past amp builds have flogged the practice of laying solid foundations into me. Thus, my overkill power section.
 
I am just sticking to the basic design for now.

Bertus- yes, I saw that and went back and looked at the data sheet, and did not find it. Thus, I though I imagine dit. Meanwhile, it was on the other site. Thanks for reminding me.
 
The decoupling capacitors are supposed to be connected as close as possible to pin 1 and to pins 3 and 4. Then their sequence does not matter.
 
Thanks AG.

As an update- I am still building this thing. I've just gotten tied up with other things. But I'll be back to it and will report in.
 
Single handedly building on a breadboard isn't impossible .. it's rather slow though.
Figuring out how to play guitar with a broken arm for test phase is going to be a trip. Guess it'll force me to keep my fingers in shape.
 
Could reamp off the multi track I suppose.
True. I am skeptical as to whether my build will work. I have had to work on it in spurts and despite using a highlighter to mark what I have completed on the schematic, work8ng this way ordinarily does not yield good results. But sometimes other duties in life get in the way, we’ll see
 
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