2 pole low frequency shelving filter design

[BobK]

That is because you are not putting a bias voltage on the + pin with that circuit, you are putting a current into it.

You need two resistors, configured as a voltage divider to set the bias.

If you keep the 100K resistor, try a 47K resistor from the + input to ground. This will give you a bias of 1.6V.

Bob

 

[Northy]

But I was feeding the V_Bias 0.5V to the 100K resistor from a bench supply.
I've just tried the 100K/47K thing, and the output goes almost right up to the +ve supply rail.
It really does seem to need 0.5V Bias voltage, I just have no idea why, and that worries me a bit.

Northy

 

[Laplace]

Sorry you've lost me a little bit there!

Then look at the explanation in a different way. What if you were asked to calculate the voltage at each input pin? You have made V_Bias a variable voltage source, so the DC voltage on the '+' input equals V_Bias. Now suppose the DC output voltage of the amplifier is Vo, can you calculate the '-' input DC voltage using Vo? Find V'-' in terms of Vo, R13 & R14, i.e. V'-' is a function of Vo, R13, R14.

Then you will have V'+' = 0.5 and V'-' = f(Vo,R13,R14).

Set V'+' = V'-', i.e. 0.5=f(Vo,R13,R14) and solve Vo=?

That value of Vo is the DC quiescent point.

 

[Laplace]

Maybe it would help to focus on the highlighted portion of your circuit:

 

[BobK]

Here:


The output is centered on 1.6V.

You will need capacitors on input and output to block the DC bias.

Edit: You can reduce the 100u to 10u.

Bob

 

[Northy]

Then look at the explanation in a different way. What if you were asked to calculate the voltage at each input pin? You have made V_Bias a variable voltage source, so the DC voltage on the '+' input equals V_Bias. Now suppose the DC output voltage of the amplifier is Vo, can you calculate the '-' input DC voltage using Vo? Find V'-' in terms of Vo, R13 & R14, i.e. V'-' is a function of Vo, R13, R14.

Then you will have V'+' = 0.5 and V'-' = f(Vo,R13,R14).

Set V'+' = V'-', i.e. 0.5=f(Vo,R13,R14) and solve Vo=?

That value of Vo is the DC quiescent point.

Sorry, I'm still a little lost, but I'd really like to understand this if you don't mind helping a bit more.

Northy

 

[Northy]

Here:
View attachment 18572

The output is centered on 1.6V.

You will need capacitors on input and output to block the DC bias.

Edit: You can reduce the 100u to 10u.

Bob

Bob, your circuit has C1 extra to mine, why is it there?

Thanks,

Northy

 

[Arouse1973]

Bob, your circuit has C1 extra to mine, why is it there?

Thanks,

Northy

Because the opamp will amplify D.C also it doesn't care if it's A.C or D.C. It will try and make the difference between the inputs approx. 0 V. So to do this the output will rise to a voltage that makes the non inverting terminal the same. But because you have a voltage divider the output will have to raise higher to do this. If you work it out you should find the voltage on the output will be the input voltage multiplied by the D.C gain, which is set by this voltage divider.
Adam

 

[Arouse1973]

This is what happens without the capacitor. The gain which is 3.32 tries to amplify the input by this. But this would give you 5.27 Volts, it can't do that so the output goes as high as it can go with the supply it has.
Adam

 

[BobK]

Thanks for explaining that Adam.

The capacitor blocks DC to the inverting input while allowing AC signals to operate normally. The capacitor is chosen to be a small impedance compared to the resistor it is in series with at the lowest frequency of concern. With a 10uF cap, the cutoff frequency is 7Hz so it has little affect for signals in the audio range

Bob

 

[Arouse1973]

Thanks for explaining that Adam.

The capacitor blocks DC to the inverting input while allowing AC signals to operate normally. The capacitor is chosen to be a small impedance compared to the resistor it is in series with at the lowest frequency of concern. With a 10uF cap, the cutoff frequency is 7Hz so it has little affect for signals in the audio range

Bob

My pleasure Bob. So much nicer working with others on a thread than being on your own I find.
Cheers
Adam

 

[Northy]

Hi,

I finally got a chance to play with this again, and adding capacitor C1 was very interesting It rolled off the low frequencies that I was a little worried about amplifying - which was good as I didn't need them

However I started getting this weird affect up at just under 2kHz and higher. This is a bit of a problem as I really want a good response up to ~3.5kHz.

Do you have any idea why this is happening?



Thanks,

Northy

 

[BobK]

Without knowing what the input signal is, it is hard to determine what effect you are talking about.

Bob

 

[Northy]

Sorry, it's a (fairly decent) sine wave, so I mean these glitches:

 

[CDRIVE]

What are you driving the input with? Your OpAmp appears to be abruptly changing output polarity as it approaches zero crossing. I can't reproduce your scope results in a Tina simulation. I'm simulating with a 200mVPP @ 3.4KHz input signal and get a unity gain (clean) output of ~200mVPP. Are you sure you've wired it exactly as Bob provided it?

Chris

 

[Northy]

Hi,

Just got back to playing with this again.
This is the circuit it is being driven with:



Thanks,

Northy