first pcb stebs - sallen key filter

[(*steve*)]

Better, but I think you can do still better

If you swap the ends that you connect the traces on R11 and R10 then you can dispense with the need to use vias for the track between them.

There appears to be a short via between C4 and C19 that can be dispensed with if you swap ends on whichever the component is on the right of this pair.

The track leading from pin 9 to the junction of C9 and R15 can be re-routed under the chip to avoid the need for vias.

The connection between R4 and R2 shouldn't need a via as the track it crosses terminates on a via anyway. Just move the via connecting C1 and pin 3 to allow yourself to route the track.

Similarly, you have a via connecting pin 4 and C9 that is blocking the trace from R10 to C9. At the very least, you could move this via and rout the track from R10from under the chip, under R14 then on to C9.

The vias between pin 8 and R17(?) can be removed and the trace run under R15

Honestly, my aim would be to do this as single sided. There are several reasons for vias. One is to connect to a ground plane, another is to admit defeat. Try not admitting defeat too often

I can't help but go back to my original advice. This board looks like you've started placing vias before you've routed the simple tracks. Consequently, rather than using vias to solve an insurmountable problem, you've caused more problems by using them. The original advice is to lay your components out first with a rat's nest and arrange them so that things are the least tangled. Some of my suggestions indicate you didn't do that, and it's costing you time and effort.

Some of my suggestions are better than others. I have treated your board as a routing exercise, and you may well need to consider signal issues

You might like to ask yourself if it would be better if R12, C5, and R10 were placed below R11, 13, and 14.

Similarly for R4 and R5 which might be moved to the top edge of the board (notice you have tracks crossing over from the chip to these components).

With those changes, you might be able to remove the trace going under the chip that doesn't connect to any of the pins of the chip (as a rule of thumb, I think this is a bad thing because it can eliminate a lot of routing options).

Maybe someone with more experience than me can point out some other options.

 

[CocaCola]

I also still see a few unrouted rats, those need to be addressed...

Did you set the design rules based on your pcb manufacture specs? I generally drop my vias down much smaller so that they take up so much space, generally the default via size in most programs is simply stupid big, yours look huge more like surface mount holes... Also I have a tendency to nest vias as close as I can to an SMD pad if I need to drop it to the bottom layer, no need to space it off a common pad, drop right away to free up more space around the chip... A perfect example of this is your IC, there is a lot of unused board under the IC that could be used to drop the vias and remove the clutter around the outside perimeter of the IC, from a quick glance you can easily move 5 or 6 vias under the IC and that frees up a lot of space outside the IC for routing on both sides...

Also if you can hide the silk screen layer when you are cleaning up or posting the tracks here as it's really just cluttering up the design...

Honestly, my aim would be to do this as single sided. There are several reasons for vias. One is to connect to a ground plane, another is to admit defeat. Try not admitting defeat too often

There is a third, sometimes the design cost vs manufacturing cost simply does not afford 'wasting' time trying to get a single sided board routed, especially since the shops I have worked with have nil cost savings between a single or double sided boards... I do like the "woohoo" effect when you can get a single sided board done, but that is mostly dampened drastically when I factor in the labor hours to get there...

 

[luke67]

ok. i reordered components ! Thank you for indications. What you think about this ?

 

[CocaCola]

I have pointed it out multiple times now and I don't believe you have addressed it, yet again there are multiple unrouted rats... These need to be routed or else nothing is going to work as you only have a partially routed circuit...

And again I have to inquire about the via size, they appear to be as big as standard part mounting though holes...

I'm also going to comment on the via right under the #2 on R2, that is just asking for a short where it's located due to it's size and proximity to the SMD pads when soldering... If it's totally covered with resist it might not be too bad but I wouldn't gamble on it... See attached for a quick fix example...

Also you really should reorganize the silkscreen if you want it to be on the final board, a lot of your silk won't get printed due to it overlapping pad areas where there will be no resist or silk printed, you will just end up with a lot of dots and dashes or incomplete numbers and letters...

 

[CocaCola]

In regards to the vias, I'm attaching a sample of a board I just laid out for a project to show you want I mean...

The 8, 7, 6, 5 are dip holes 60th (inch) diameter, the vias are 26th... The traces are a wide 20th...

The SMD chips are 1206 for size comparison...

 

[(*steve*)]

There is a third, sometimes the design cost vs manufacturing cost simply does not afford 'wasting' time trying to get a single sided board routed

Sure. I didn't say "never admit defeat". Do a sensible amount of effort -- and when you're learning, that may be quite a bit.

ok. i reordered components ! Thank you for indications. What you think about this ?

That's looking a lot cleaner, however two of those three traces passing through vias are trivially removed. The third is difficult.

I think a 90% reduction is a good outcome.

Edit: taking the lead from R4 to the IC between the pads of R5 will probably make routing of the connection to R4 easier (the one still shown unrouted)

 

[gorgon]

If you layout for a 2-layer PCB, why not use both layers?
You should also resize your vias, don't use square pads.
Have you run the DRC for this layout? (Design Rule Check) From what I can see you have some shorts, or too close paths.

I know, it's not easy to get everything correct the first time, but only feedback and experience will help that out.

When doing production SMD PCBs you also need to think over the soldering process you are going to use, the different processes need slightly different layout considerations.
but untill then, enjoy your learning curve.

TOK

 

[CocaCola]

If you layout for a 2-layer PCB, why not use both layers?

That is the way I look at it as well, on anything less than dirt simple (usually home etched) I will require plated through holes for my boards and with that every shop I have worked with they will charge you for two layers once you want the plated holes so I might as well use the second layer I'm going to pay for, and the cost is honestly very near the same nowadays...

 

[(*steve*)]

If you layout for a 2-layer PCB, why not use both layers

Pride in your workmanship? (Only partially kidding).

You may want to use that second side for a ground plane, and having too many tracks on the other side can muck that up. Likewise if you're using it for heatsinking.

If things get complex enough, you may need that second layer. I guess you can always say "Well, if they can do 4 layer boards, why not use them".

When it comes down to it, it gives you more options. At some point you need to decide what to do with your options. You can't do that if you have no idea they exist.

 

[gorgon]

steve:
My question was triggered by the fact that there already was 2 or 3 paths running on the bottom layer. It could of course just be a planned jumper for a single layer PCB, I've seen that before, hence my question.

TOK

 

[CocaCola]

You may want to use that second side for a ground plane, and having too many tracks on the other side can muck that up. Likewise if you're using it for heatsinking.

Those are certainly valid but in both cases that decisions should be made prior to any routing even starts, IMO...

I guess you can always say "Well, if they can do 4 layer boards, why not use them".

Since the cost has come down on 4 layer, I know several people that do exactly that... I also know a few that combine what you suggested previous about using inside layers as supply and/or ground planes (or even a top or bottom for sinking) and do most of the routing on the other layers just to make it simple...

 

[gorgon]

Since the cost has come down on 4 layer, I know several people that do exactly that... I also know a few that combine what you suggested previous about using inside layers as supply and/or ground planes (or even a top or bottom for sinking) and do most of the routing on the other layers just to make it simple...

We normally do 4 layers at work. The inner power and ground layers are good for noise reduction, and since we are in Europe, all commercial electronics need CE marking, and testing.
Routing signals on the outer layers will also make small changes and prototype reworking possible without too much trouble.

Personally it's a long time since I saw single layer production advertised, at least for FR4 boards.

TOK

 

[(*steve*)]

OK, I'll believe you. I don't do 4 layer boards.

I presume you do see a problem with the original board having 20 or more traces on the second layer when trivial routing could remove most of them.

If you don't then we'll have to agree to disagree.

 

[gorgon]

I presume you do see a problem with the original board having 20 or more traces on the second layer when trivial routing could remove most of them.

Sure, I totally agree, most of my comments reflects on what was done, I did not analyze the layout in itself. Since this is a relative simple layout, rearranging components would do wonders with the ease of routing.
Size and choice of components would also make things more easy.

I have one problem with the through hole connector, if using a single layer PCB you'll need to mount it on the reverse side of the PCB, with no plating in the holes. But that is really just a point of view problem, you may put the connector on the top and the SMDs on the bottom(single) layer.

TOK

 

[luke67]

ok. I rearranged inductance considering your helps. What about this solution ? I know that I have to reduce vias but It looks very hard to me... THANK YOU ALL !!!!

 

[(*steve*)]

Well, you have far fewer vias than previously. There are 6 more that can be easily removed (by bringing some traces back to the front layer), but I think we've been chasing this rabbit down enough holes for a while.

I have to question why you need to reduce vias. Whilst I think it's a laudable aim, and one that I've been suggesting, your question hints at there being some other reason.

I would probably also suggest you try to neaten up the layout a bit. All the shuffling of things has left it looking a little ragged. You can leave this for a while if you think there's going to be more editing though.

 

[CocaCola]

ok. I rearranged inductance considering your helps. What about this solution ?

Again I have to asked about the unrouted rats, is what I'm asking going over your head? As it stands it appears you have two pins on the IC that have yet to be routed and they are not impossible to route but you have painted them into corners that will likely result in you having to change a few of the other routes to get them routed...

I know that I have to reduce vias but It looks very hard to me...

I'm sure there is a way to set them globally but I'm not all that familiar with Eagle, but I do know you can right click on the vias and adjust their properties, just set a smaller drill...

 

[luke67]

Well, you have far fewer vias than previously. There are 6 more that can be easily removed (by bringing some traces back to the front layer), but I think we've been chasing this rabbit down enough holes for a while.

.

ehm what does it mean " chasing this rabbit down enough holes for a while " ? If you have any idea of how remove other 6 vias I'll appreciate very much !

I have to question why you need to reduce vias. Whilst I think it's a laudable aim, and one that I've been suggesting, your question hints at there being some other reason.
.

The reason is that they told me that the second layer should remain as empty as possible in order to leave it as a ground plate

 

[luke67]

Again I have to asked about the unrouted rats, is what I'm asking going over your head? As it stands it appears you have two pins on the IC that have yet to be routed and they are not impossible to route but you have painted them into corners that will likely result in you having to change a few of the other routes to get them routed...

The reason that I left alimentation unrouted is that i Have to add other 14 Opamp in the layer so I'll wait to place all of them and then I'll route also V+ e V-

 

[luke67]

I'm sure there is a way to set them globally but I'm not all that familiar with Eagle, but I do know you can right click on the vias and adjust their properties, just set a smaller drill...

My aim is to reduce the amount not the size (I already resized them; now they have 0,4 mm of diameter)