September 14, 2022 by Earl Testing MKP105
Learn how manufacturers characterize and estimate the long-term drift (LTD) of a voltage reference for electronic component aging prediction.
While the output of a voltage reference should be ideally independent of temperature and time, real-world voltage references can be affected by both temperature and aging. With that in mind, this article will discuss how manufacturers characterize and estimate the LTD of a voltage reference. To better set the stage for this article, it might be important to read the previous articles to learn about the aging effect in quartz crystals, resistors, and amplifiers.
Overall, the output of a voltage reference changes with time. Generally, the doping levels of the semiconductor material and the physical stress that the packaging material applies to the voltage reference die change with time, leading to an LTD in the output of the voltage reference. The LTD of a voltage reference is defined by:
Where:
Figure 1 shows the LTD data gathered from five samples of a typical bandgap reference from Analog Devices.
In this case, the test is conducted inside an environmental chamber at 50 °C for 1000 hours. Note that LTD is specified as a typical value in datasheets and the part-to-part variation can be considerable.
The true aging of any electronic component can only be measured by operating it under the conditions of the end application over the desired lifetime, which can span 10-25 years in some applications. This is not practical.
With some electronic components, such as resistors and quartz crystals, manufacturers use an accelerated aging process that involves examining the device for a time duration in the range of 1000 hours at a much higher temperature than the normal operating temperature of the device. These high-temperature accelerated aging tests, which are based on the Arrhenius Law or equation, can be used to estimate the device drift over longer periods of time.
In the case of voltage references, high-temperature accelerated aging methods lead to an erroneously optimistic prediction of the aging process. That’s why major chip manufacturers, such as Texas Instruments (TI), Linear Technology, and Maxim Integrated (now a part of Analog Devices), commonly test the device aging at the nominal operating temperature of the reference voltage and avoid the Arrhenius equation-based methods.
Different chip manufacturers might provide the aging data of their voltage references over different test durations. For example, as shown in Figure 2, TI provides the long-term stability data of the REF50xx over 4000 hours.
The question to be asked now is, how can we estimate the aging effect beyond the provided test times? The aging effect of a voltage reference is a nonlinear function of time and is assumed to be proportional to the square root of the circuit's operational time. Having the 1000-hour LTD value, the LTD after an arbitrary operational time, t, can be estimated in Equation 1:
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LTD(t)=LTD(after1000hours)×t1000
Where t is in hours. For example, assuming that the 1000-hour LTD of the REF50xx is 25 ppm, we can expect to have a typical LTD of 70 ppm after 8000 hours. Figure 3 compares the curve obtained by the above equation with the REF50xx LTD data gathered for one year (8760 hours) at 35 °C.
Note that, after about 4000 hours, the value obtained from the equation is larger than the typical value obtained from measurements. Equation 1 is a simple model of the aging behavior and gives only an estimate of the actual performance. The aging effect is a random process, and different voltage references might behave differently as they settle to their final LTD value. Equation 1 allows us to estimate the device's performance over a long period of time; however, we should note that this simple equation cannot precisely model the complicated aging behavior of voltage references.
The LTD performance of a voltage reference is significantly affected by the mechanical stresses from the packaging material. The same voltage reference die built into a larger package can deliver a lower LTD. Figure 4 shows how placing the REF34 die in a VSSOP package, which is a relatively larger package, can outperform the same design packaged as SOT23.
Additionally, voltage references in ceramic packages usually have better LTD performance than plastic-type packages. This advantage is because ceramic packages use different compounds and assembly technologies that lead to far lower levels of post-assembly flexing than plastic packages. Figures 5 and 6, respectively, depict the LTD curves of the MAX6070, which is built into a plastic package, with that of the MAX6079, which comes in a ceramic package.
As you can see, a ceramic-packaged voltage reference provides a much better long-term stability than that of a plastic-packaged device.
LTD is characterized by aging a sample population of the device under test in a controlled environment. Since voltage references are susceptible to humidity and temperature variations, the tests should be conducted inside an environmental chamber at constant temperature and humidity, e.g. at 25 °C, 40% relative humidity. Figure 7 shows how the output of a plastic-packaged voltage reference can slowly change in response to humidity variations.
Therefore, it is important to use a humidity-controlled environmental chamber. During the test, the parts are operated without interruption, and their outputs are measured periodically. The test setup should be backed by an uninterruptible power supply (UPS) to ensure that the devices won’t be reset if a power failure occurs. Aging data are commonly provided for at least 1000 hours; however, due to the critical role of voltage references in the instrumentation of industrial plants, manufacturers are being encouraged to go beyond 1000 hours of test time to ensure accurate, reliable operation. The following figure shows the MAX6126 LTD data gathered over 3500 hours.
Although the Arrhenius equation-based methods are not used in the aging prediction of voltage references, the aging of a voltage reference is still accelerated at elevated temperatures. That’s why burning the parts in power-on condition can stabilize the devices over a shorter period of time and thus, have minimal variations in the end application. A typical burn-in procedure might operate the board at 125 °C for 168 hours or at 85 °C for about 400 hours.
If the main concern is stress relief, an unpowered burn-in cycle can be also used. To reduce the LTD effect, it is also recommended to perform the initial system calibration as late as possible to trim out the early changes from aging through the initial calibration.
