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Working of a JK Flip-Flop. Help needed with the circuit.

Greetings Everyone,
This is my very first thread on this forum and as you may have guessed I am a beginner in electronics. I was just studying about flip flops and wanted to see a practical demonstration of the jk flip flop. can anyone provide me with a schematic so that i can see it in action on the breadboard. (I have a 74ls76n JK flip flop with preset and clear).
Many thanks.

Strix
 
I did check out the website and it was quite interesting but i could not find the required schematic.
I just want a simple jk flip flop circuit.

Strix
 
Try talkingelectronics web site. Many beginner circuits and animations there for various things.

I did check out the website and it was quite interesting but i could not find the required schematic.
I just want a simple jk flip flop circuit.

Strix

P.S Darn! Sorry I am kinda new to forums.
 

(*steve*)

¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd
Moderator
I just googled for "jk flip flop schematic" and it gave me one (actually two).
 
I don't really want to know how to build a JK flip flop i want to make it change it's output states on my breadboard. I wish to see it in action with just a tactile switch. Thanks for your attention, I really am grateful.:)
 

(*steve*)

¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd
Moderator
Oh ok, I see what you mean.

What flip flop do you have? Give us the full part number. There are important differences between logic families which will trip you up if you're not aware. Also the type of flip flop will decide what we can simply do with it.
 

(*steve*)

¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd
Moderator
Wow, AudioGuru! How did you know ?!
I AM using a 74ls76n jk flip flop.

It could have something to do with the fact that you mentioned it in your first post (and that I missed it)

A clock pulse is a logic signal which goes from one state to the other, then back again. The edges are fast and it has a duration at least "long enough" for the device bring triggered. Long enough is typically some small number of ns, but the pulse is normally longer.

In the case of your chip, most stuff happens on the rising edge of the clock pulse (the exception being some stuff with the preset and clear inputs -- which are asynchronous but have some interaction with the falling clock edge, but let's not talk about that).

This is a low power Schottky TTL chip (that's the LS in the chip name). The important part is the TTL bit. This means that any input below about 0.8V is considered a logic low level. Anything above 2.4V is a logic high level. Leaving an input disconnected will result in the input seeing a logic high level.

If power is applied, the outputs are connected via a resistor and a LED to the positive rail, these LEDs will illuminate when the outputs are LOW. After applying power either one of the LEDs will be illuminated.

If you connect (for a moment) either the preset or clear to ground, the outputs will go into one of two known states. It doesn't matter if you connect the set just once to ground, or many times to ground, it either changes to or starts in the set state.

If you connect a SPDT switch so that the common is connected to ground and the other two connections are set and reset, then the output of the flip flop will match the switch position. This might not seem like any sort of achievement, but it removes many random transitions caused by contact bounce. What you have created is a way to generate fast, clean logic level transitions -- the major requirement for a clock signal.

If you disconnect one of the LEDs from the output and connect this to the clock input of the other flip flop, the remaining LED will be illuminated when the clock is high.

Now you can connect LEDs to the output of the other flip flop, and switches between the other inputs of the second flip flop and ground. With these and the clock input you can investigate the behaviour of the flip flop.

Try to reproduce and confirm the behaviour that is listed in the datasheet.
 
It could have something to do with the fact that you mentioned it in your first post (and that I missed it)

A clock pulse is a logic signal which goes from one state to the other, then back again. The edges are fast and it has a duration at least "long enough" for the device bring triggered. Long enough is typically some small number of ns, but the pulse is normally longer.

In the case of your chip, most stuff happens on the rising edge of the clock pulse (the exception being some stuff with the preset and clear inputs -- which are asynchronous but have some interaction with the falling clock edge, but let's not talk about that).

This is a low power Schottky TTL chip (that's the LS in the chip name). The important part is the TTL bit. This means that any input below about 0.8V is considered a logic low level. Anything above 2.4V is a logic high level. Leaving an input disconnected will result in the input seeing a logic high level.

If power is applied, the outputs are connected via a resistor and a LED to the positive rail, these LEDs will illuminate when the outputs are LOW. After applying power either one of the LEDs will be illuminated.

If you connect (for a moment) either the preset or clear to ground, the outputs will go into one of two known states. It doesn't matter if you connect the set just once to ground, or many times to ground, it either changes to or starts in the set state.

If you connect a SPDT switch so that the common is connected to ground and the other two connections are set and reset, then the output of the flip flop will match the switch position. This might not seem like any sort of achievement, but it removes many random transitions caused by contact bounce. What you have created is a way to generate fast, clean logic level transitions -- the major requirement for a clock signal.

If you disconnect one of the LEDs from the output and connect this to the clock input of the other flip flop, the remaining LED will be illuminated when the clock is high.

Now you can connect LEDs to the output of the other flip flop, and switches between the other inputs of the second flip flop and ground. With these and the clock input you can investigate the behaviour of the flip flop.

Try to reproduce and confirm the behaviour that is listed in the datasheet.

Wonderful information *steve* . I'll be sure to get an spdt switch and post it when I make it !
Many Thanks,

Strix
 
It could have something to do with the fact that you mentioned it in your first post (and that I missed it)

A clock pulse is a logic signal which goes from one state to the other, then back again. The edges are fast and it has a duration at least "long enough" for the device bring triggered. Long enough is typically some small number of ns, but the pulse is normally longer.

In the case of your chip, most stuff happens on the rising edge of the clock pulse (the exception being some stuff with the preset and clear inputs -- which are asynchronous but have some interaction with the falling clock edge, but let's not talk about that).

This is a low power Schottky TTL chip (that's the LS in the chip name). The important part is the TTL bit. This means that any input below about 0.8V is considered a logic low level. Anything above 2.4V is a logic high level. Leaving an input disconnected will result in the input seeing a logic high level.

If power is applied, the outputs are connected via a resistor and a LED to the positive rail, these LEDs will illuminate when the outputs are LOW. After applying power either one of the LEDs will be illuminated.

If you connect (for a moment) either the preset or clear to ground, the outputs will go into one of two known states. It doesn't matter if you connect the set just once to ground, or many times to ground, it either changes to or starts in the set state.

If you connect a SPDT switch so that the common is connected to ground and the other two connections are set and reset, then the output of the flip flop will match the switch position. This might not seem like any sort of achievement, but it removes many random transitions caused by contact bounce. What you have created is a way to generate fast, clean logic level transitions -- the major requirement for a clock signal.

If you disconnect one of the LEDs from the output and connect this to the clock input of the other flip flop, the remaining LED will be illuminated when the clock is high.

Now you can connect LEDs to the output of the other flip flop, and switches between the other inputs of the second flip flop and ground. With these and the clock input you can investigate the behaviour of the flip flop.

Try to reproduce and confirm the behaviour that is listed in the datasheet.
Hey, I just remembered, HOW 'BOUT creating a clock pulse with a 555 timer. Is it possible?
Thanks

Strix
 

(*steve*)

¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd
Moderator
All of those are possibilities.

My suggestion gives you full control over when the signal transition occurs. This is great for learning what happens.

An oscillator (e.g. a 555) is fine when you want something to run with a continuous clock. But this will generally be too fast for you to set things up to see what is going on, even if it only changes states once every second or so.

A monostable is fine if you want a single clock pulse when some event occurs. As you recall, a clock pulse is two transitions, the logic level changes from it's rest state to the other state for a short time before returning to the rest state.
 
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