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Why did connecting this resistor to Jfet gate make the circuit work?

Hi

I have been designing a sample and hold circuit and the portion im confised about is shown below. Im not using multisim, its just a drawing tool.

The tl071 is a comparator that I havnt bothered to draw properly that outputs around +/- 4.5V depending on its input

Q1 switches on and off based on this and the cap charges to the "cap charge voltage" which is between 0.1V (shown) and 3.1V at its max.

U2A is just a high impedence buffer to trap the charge.

Q1 is a Jfet 2N3819 (standard)

the switch -Q1 is turned on and off very fast to store whatever voltage is at the drain on the cap. so the sample command causes the comparator to go to 4.5V and then back down to -4.5 very fast.

OK so - when the 10 Mohm resistor WAS NOT there the circuit didnt work - the cap discharged fast, sometimes going up and down a bit - it was pretty useless.

I decided to mess about and add various resistances to the gate. low and behold when I did this it started to work! the bigger the resistance, the more accurate the capacitor charge (as R1 was increased the cap voltage was closer to 0.1V in this example)

I cannot fathom why this helped. I thought the Jfet gate had massive resistance anyway so what use is adding a bit extra? Im thinking something to do with the op amp output resistance or something in its internal circuitry?

Anyway it works nicely as shown but it realy bothers me that I dont understand what the R1 has achaived.

Can anyone help here?

Thanks

sh.PNG
 

(*steve*)

¡sǝpodᴉʇuɐ ǝɥʇ ɹɐǝɥd
Moderator
You shouldn't take the gate potential above the source. In your circuit there's nothing to do that. The 10M resistor limits the current through the forward based gate. It will still need things up, just by less.
 
The datasheet for a 2N3819 Jfet shows that some of them are still turned on a little (200nA) when the gate-source voltage is -7.5V and yours is only -4.5V.

The Jfet has drain-source and drain-gate capacitance that takes time to discharge through a gate resistance as high as 10M ohms.
 
You shouldn't take the gate potential above the source. In your circuit there's nothing to do that. The 10M resistor limits the current through the forward based gate. It will still need things up, just by less.

Sorry I dont understand.
The datasheet for a 2N3819 Jfet shows that some of them are still turned on a little (200nA) when the gate-source voltage is -7.5V and yours is only -4.5V.

The Jfet has drain-source and drain-gate capacitance that takes time to discharge through a gate resistance as high as 10M ohms.

Ok thanks for the reply

Are you saying this - Despite being in what I thought was the "off" state, the Jfet is allowing some discharge through the parasitic capacitance, and my big resistor is slowing it down, hence why it solves the problem?

I didnt see that -7.5 volt thing. thanks for that, but even still, 200nA seems small enough that the cap should stay more or less the correct voltage for a few seconds at least! (with no resistor)
 
But you have only -4.5V so the of the Jfet needs -7.5V then it will conduct much more than 200nA. The original circuit that you linked on your other thread about it shows a different Jfet (2N5457) that is cutoff with about 5V max. and has a -10V signal to make sure it is completely turned off.
EDIT: corrected your voltage.
 
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But you have only -4.5V so the of the Jfet needs -7.5V then it will conduct much more than 200nA. The original circuit that you linked on your other thread about it shows a different Jfet (2N5457) that is cutoff with about 5V max. and has a -10V signal to make sure it is completely turned off.
EDIT: corrected your voltage.
OK I understand. But Im still confused about how adding the 10Mohm resistor greatly improved performance/reduced leakage

Also im looking at the datasheet and the -7.5V is for Vgs MAX. Is that not the maximum before it is damaged?
 
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You are using an opamp with a problem instead of using a real comparator. The TL07x and TL08x have a problem called Opamp Phase Inversion where the output suddenly goes high if an input voltage gets within about 4V from the negative supply. Then the resistor slows this down so maybe it happens only without the resistor.

The datasheet for the 2N3819 Jfet shows that its maximum allowed reverse-biased Vgs is -25V and that its Vgs for 200uA of drain current is from -0.5V to -7.5V. The Vgs for 2uA of drain current is a maximum of -8V so with your -4.5V you might have a Jfet that is turned on pretty strongly instead of being cutoff. The 2N3819 has a Vgs range of 15 times.
 
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