How is "Triggering' set?
--
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Michael A. Terrell
Central Florida
General
The A Trigger Generator circuit produces the trigger pulse used to
start the
Sweep Generator circuit that provides the A portion of the CRT
display. The
trigger pulse is derived from the internal trigger signal from the
vertical
deflection system, an external signal connected to the external
trigger input
connector, or a sample of the line voltage connected to the
instrument. Controls
are provided to select trigger level, slope, coupling, and source.
Fig 3.5 Detailed block diagram of the A Trigger Generator circuit.
Trigger Source
Trigger SOURCE switch S505 selects the source of the trigger signal.
The sources
available to the A Trigger Generator circuit are the signal being
displayed
(NORM), Channel 1 (CH 1), Channel 2 (CH 2), the instrument line
voltage LINE),
and external signals (EXT and EXT div 10). Emitter followers Q502,
Q504, and
Q506 provide isolation between the input to the A Trigger Circuit and
the output
of the Vertical Channel Switching Circuit.
In the LINE mode of triggering, a sample of the power line frequency
is obtained
from the secondary of the power transformer T1400 in the Low Voltage
Power
Supply circuit. The Trigger COUPLING switches should not be in the
LFREJ mode
when using the instrument line voltage as a trigger signal source.
Trigger Coupline
The Trigger COUPLING switches offer a means of accepting or rejecting
certain
components of the trigger signal. In the AC, LF REF, and HF REJ mode
of trigger
coupling, the DC component of the trigger signal is blocked by
coupling
capacitors C515 or C516. Frequency components below about 60 Hz are
attenuated
when using AC or HF REFJ coupling and below about 50kHz when using LF
REJ
coupling. The higher frequency components of the trigger signal are
passed
without attenuation. In the HF REJ mode of trigger coupling, the high
frequency
components of the trigger signal (above about 50 kHz) are attenuated,
while the
lower frequency components (between about 60 Hz and 50 kHz) are passed
without
attenuation. The DC mode of trigger coupling passes unattenuated all
signals
from DC to 200 MHz and above.
Input Source Follower
....
Paraphase Amplifier
....
The slope of the input signal that triggers the Sweep Generator
circuit is
determined by the setting of the SLOPE switch S530. When the SLOPE
switch is set
to the + position, the output signal at pin 8 of US20 is inverted with
respect
to the input signal, and the output signal at pin 9 is in phase with
respect to
the input signal. When the SLOPE switch is set to the - position, the
output
signal at pin 8 is in phase with respect to the input signal, and the
output
signal at pin 9 is inverted with respect to the input signal.
Tunnel Diode Driver
....
Trigger View Amplifier
The Trigger View Amplifier circuit amplifies a sample of the signal
present in
the A Trigger Generator circuit and passes it on to the Vertical
Output
Amplifier for display n the CRT when the TRIG VIEW pushbutton is
pressed. This
provides a method of making a quick and convenient check of the signal
being
used to trigger the oscilloscope and is intended primarily to be used
to check
the timing difference between the trigger signal and the vertical
deflection
signal.
The amplifier consists of two emitter-coupled pushpull amplifier
stages. The emitter source voltage for Q662 and Q672 is switched on
and off by the TRIG VIEW pushbutton. With the TRIG VIEW bushbutton not
pushed, the emitters of Q662 and Q672 are returned to ground through
R665. This reverse-biases the base-emitter junctions of the
transistors, preventing any loading of the A Trigger Generator
circuit. When the TRIG VIEW pushbutton is pushed, the emitters are now
returned to +15 volts through R663 and R679. This forward biases Q662
and Q672 to allow signal amplification. Trigger View Centering
adjustment R673 adjusts for correct DC balance in the circuit.
Normally, the output of the Vertical Channel Switching circuit is
applied to the input of the Delay Line. When the TRIG VIEW pushbutton
is pushed, the signal from the Vertical Channel Switching circuit is
removed and the output from the Trigger View Amplifier is applied in
its place.
Sweep and Z-Axis Logic
The Sweep and Z Axis Logic Circuit derives the logic levels necessary
to control the sequence of events associated with sweep generation and
CRT unblanking. The +A and +B GATE signals are also generated in this
circuit. Positive logic terminologies and symbologies are used in the
following explanation of circuit operation. Fig. 3-6 shows a detailed
block diagram of the Sweep and Z-Axis Logic circuits.
....
Pin3. This is the positive tunnel diode output terminal. In the AUTO
mode of operation (TRIG MODE set to AUTO) at the end of the holdoff
time period, pin 1, pin 16 and pin 19 are LO, and pin 8 is HI. This
causes the gate level at pin 3 to step LO to turn Q574 on, which
initiates a sweep.
Pin 6. This is the auto RC timing terminal. R609 and C609 determine
the amount of time between loss of trigger signal and the generation
of an auto gate at pin 3 when TRIG MODE is set to AUTO.
....
Pin 8. This is the holdoff timing terminal. The time between the end
of an individual sweep and the start of the next sweep is determined
by RC components that affect the time constant of voltage of pin 8.
The TIME/DIV control selects fixed components in the holdoff timing
circuit and the A TRIG HOLDOFF control allows a variable holdoff
setting in each position of the TIME/DIV control. When pin 8 goes HI,
pin 17 will go LO and allow the trigger tunnel diodes to fire on an
incoming signal or generate an auto gate in the Auto mode if pin 6 is
HI.
Pin 11. This terminal lights the READY light when operating in the
single sweep mode.
....
Pins 14 and 15. Single Sweep reset terminals. Pressing the SINGL SWP
pushbutton prepares the single sweep circuitry to respond to the next
triggering event. Also, this action causes the READY light to be lit.
Main Gate Comparator
Q572 and Q574 form the Main Gate Comparator and are connected as a
voltage comparator, where both transistors do not conduct at the same
time. The input signal to the stage is the positive-going trigger
signal from the A Firing Trigger TD in the A Trigger Generator
circuit. The signal at the collector of Q574 is inverted by Q588, is
connected to the Z Axis Logic Multivibrator to control CRT blanking,
and to Q584 to generate the A + GATE output signal. The signal at the
collector of Q572 connects to the base of the Main Gate Amplifier
stage (Q902) in the Sweep Generators circuit to initiate sweep
generation.
Delayed Gate Comparator
....
A Trigger TD Reset Circuit
....
Holdoff Start Circuit
....
Z Axis Logic Multivibrator
....
Delaying Sweep Latch Circuit
Q788, Q794, and Q796 form the Delaying Sweep Latch Circuit. The
circuit function is used during the three delayed sweep modes of
operation that the instrument is capable of (MIX, A INTEN, and B
DLY'D). Q938A, in the Delay Pickoff Comparator of the Delaying Sweep
Generator, is the current source for the emitters of Q794 and Q796.
Prior to the end of the delay time selected by the A TIME/DIV switch
and DELAY TIME POSITION control, Q938A is off, thereby causing both
Q794 and Q796 to be off also. The base level of Q794 sits at a more
negative level than does the base of Q796 so that when Q938A turns
on, at the delay pickoff point, Q794 will turn on and Q796 will remain
off. The resultant positive movement at the collector of Q794 is
connected to the B Trigger TD Reset Circuit.
....
B Trigger TD Reset Circuit
....
Main Sweep Holdoff Gate and Delayed Sweep Override Amplifier
....
During the delayed sweep, Q798 functions as an override amplifier. It
is possible, with the right combination of control settings, to
achieve a delayed sweep presentation where the delayed sweep would
normally want to continue running after the end of the delaying sweep.
For instance, if the TIME/DIV controls are set only 1 or 2 ranges
apart and the DELAY TIME POSITION control is set to a 8.50 setting.
Under these conditions the delaying sweep end-of-sweep pulse occurs
before the delayed sweep end-of-pulse. The positive movement on the
collector of Q588 at the time of delaying sweep end-of-sweep pulse
turns Q798 on. The negative movement on the collector of Q798 pulls
down on the collectors of Q794 and Q796, through CR793 and CR792
respectively, which in turn pulls down on the base of Q792. ...
A + GATE and B +GATE Amplifiers
Q584 and Q824 are the A +GATE and B +GATE amplifiers respectively.
They provide the +GATE output signals available at the instrument rear
panel. These output gate signals are positive-going rectangular
waveforms, approximately 5 volts in amplitude, coincident with their
respective sweep waveforms.
LOW LINE Indicator Circuit
Q1492, Q1498, and their associated circuitry monitor the unregulated
voltage in the +50 volt supply and provide a visual indication (via
the LOW LINE indicator on the front panel) when the applied line
voltage falls below the lower regulating limit selected by the
Regulating Range Selector assembly. Q1482 provides operating power to
the CRT graticule lights that is adjustable via the SCALE ILLUM
control R1480.
Sweep Generators Timing and Horizontal Display Switching
The Sweep Generators provide several sweep display modes, dependent
upon the horizontal mode selected by the HORIZ DISPLAY switch. One
sweep generator may be employed as a delay circuit for a second sweep
generator, permitting a variety of useful display modes. Before the
discussion of sweep generation, it is helpful to become familiar with
each principle mode of horizontal display and its associated sweep
generator, sweep gate and sweep display labeling. See Table 3-2 for a
list of sweep generator, sweep gate and sweep display terminology
whenever needed throughout the following sweep generators discussion.
Table 302
Horizontal Display Sweep Generator
Terminology Gate that
HORIZ DISPLAY CRT
Display Initiates
Sweep
Switch Setting
------------------------------------------------------------
Portion of Sweep Sweep
Generator
Displayed on CRT Used
for Display
A (TIME/DIV A Non-
Delaying Main
Knobs Locked)
A (TIME/DIV A
Delaying Main
Knobs Unlocked)
MIX A ( First Portion)
Delaying Main
--------------------------------------------------------------------------------------
B (Last Portion)
Non-Delaying Delayed
A INTEN A
Delaying Main
-------------------------------------------------------------------------------------
B (Intensified Portion) Non-
Delaying Delayed
B DLY'D B
Non-Delaying Delayed
(After being delayed
by Delaying Sweep)