J
John Larkin
Just over 6 weeks after we filed our first service request on the
THS3062 problem, TI got back to us. In the interim, we bugged them at
least weekly, and also got involved two distributors, the local TI
rep, and the ultimate motivator, TI's vice-president of ethics.
The problem is that, when powered from +-12 volts and outputting a
+-10 volt sine wave, at about 12 MHz signal frequency the chip
crashes: amplitide falls by about 4:1, the chip draws huge supply
currents and gets red hot, and output phase reverses. After a lot of
flunkies questioned our layout, bypassing, intelligence, and stuff
like that, they finally announced that the amp is intended for use in
applications where rapid slews are separated by time in which
"internal amplifier nodes are allowed to reach equilibrium."
Jim suggested such, based on small wiggles in the closed-loop
frequency graphs on the datasheet. So, why is the problem only hinted
at by small wiggles? Why isn't this massive defect noted on page 1, in
24-point type?
We're re-doing the pcb layout, an 8-layer VME board with a bazillion
parts... uP, two fpga's, dacs, all sorts of stuff. Grrrrr.
This is, incidentally, a function generator that was supposed to
output +-10 volts behind 50 ohms, up to 32 MHz, sort of what somebody
brought up in another thread nearby. We may keep the +-10 volt spec if
the replacement amps hold up, but we are adding power supply hooks to
use lower-voltage amps and bail down to about +-5 swing if necessary.
John
THS3062 problem, TI got back to us. In the interim, we bugged them at
least weekly, and also got involved two distributors, the local TI
rep, and the ultimate motivator, TI's vice-president of ethics.
The problem is that, when powered from +-12 volts and outputting a
+-10 volt sine wave, at about 12 MHz signal frequency the chip
crashes: amplitide falls by about 4:1, the chip draws huge supply
currents and gets red hot, and output phase reverses. After a lot of
flunkies questioned our layout, bypassing, intelligence, and stuff
like that, they finally announced that the amp is intended for use in
applications where rapid slews are separated by time in which
"internal amplifier nodes are allowed to reach equilibrium."
Jim suggested such, based on small wiggles in the closed-loop
frequency graphs on the datasheet. So, why is the problem only hinted
at by small wiggles? Why isn't this massive defect noted on page 1, in
24-point type?
We're re-doing the pcb layout, an 8-layer VME board with a bazillion
parts... uP, two fpga's, dacs, all sorts of stuff. Grrrrr.
This is, incidentally, a function generator that was supposed to
output +-10 volts behind 50 ohms, up to 32 MHz, sort of what somebody
brought up in another thread nearby. We may keep the +-10 volt spec if
the replacement amps hold up, but we are adding power supply hooks to
use lower-voltage amps and bail down to about +-5 swing if necessary.
John
