Tips on routing this high density/high current board? I'm stuck - any ideas?

[[email protected]]

I am building a display consisting of a series of seven 5x7 LED dot
matrix displays, butted up against one another. The displays are of
the 0.7" variety (about as small as they come). I will be driving them
with PWM to control brightness, using shift registers to control the 35
horizontal elements, and switching the 7 rows sequentially to paint the
display. The pulse current on each dot is 100ma, and times 35
horizontal dots, that's a potential max of 3.5A.

Problem is, I am trying to keep the board small. The traces required
to handle 3.5A are pretty fat - too fat to allow the close spacing I
need for the project.

Anyone have any tips?

Some ideas....

I could mount the through-hole displays in DIP to SMT adapters and
surface mount them, freeing up the back of the board to route my
traces. Downside is cost and increased complexity, and the board would
be thicker

I can seperate out the segments into 2, 2 and 3 and they'd be 1A, 1A,
1.5A, which I can fit the traces. However now I am faced with routing
three fat traces to each of my power transistors that switch the rows,
and I'd definitely have to increase the board size to accomodate

I can use a 4-layer board... probably the most suitable solution, but
more expensive

I am already putting all my shift registers and microcontroller on a
sub-board, so I've trimmed the components on the display to the bare
minimum.

Any other ideas? Routing this board is driving me nuts!

Thanks!

Corp.

 

[Eeyore]

I am building a display consisting of a series of seven 5x7 LED dot
matrix displays, butted up against one another. The displays are of
the 0.7" variety (about as small as they come). I will be driving them
with PWM to control brightness, using shift registers to control the 35
horizontal elements, and switching the 7 rows sequentially to paint the
display. The pulse current on each dot is 100ma, and times 35
horizontal dots, that's a potential max of 3.5A.

Problem is, I am trying to keep the board small. The traces required
to handle 3.5A are pretty fat - too fat to allow the close spacing I
need for the project.

Anyone have any tips?

Yes.

Use the right size track !

What's the duty cycle on the segements ?

Each track needs to be sized for Ipulse * duty cycle.

If you need > 10 thou ( mil ) I'd be surprised.

Graham

 

[Fred Bartoli]

Eeyore a écrit :

Yes.

Use the right size track !

What's the duty cycle on the segements ?

Each track needs to be sized for Ipulse * duty cycle.

What matters is average power, so make that
Ipulse * sqrt(duty cycle).

 

[Eeyore]

Eeyore a écrit :

What matters is average power, so make that
Ipulse * sqrt(duty cycle).

Silly me. You're quite right.

Graham

 

[neon]

I have doubts that you require 100 ma per dot that is a lot for an LED probably the voltage will be 4v to get there now we have serious power dissipation in a small area. usualy an LED if superbright and can get to 6k lumens and higher. I GOT SOME GREEN SUPERBRIGHT UP TO 16K and they do reach up to 100ma at 4v but the power is reaching the limit of the device. and basicaly are are 10mm in diameter. I think you should find out what an LED can do before designing anything.

 

[[email protected]]

Yes.

Use the right size track !

What's the duty cycle on the segements ?

Each track needs to be sized for Ipulse * duty cycle.

If you need > 10 thou ( mil ) I'd be surprised.

Graham

Duty cycle is 1/10th for each row

 

[[email protected]]

Eeyore a écrit :


What matters is average power, so make that
Ipulse * sqrt(duty cycle).

I feel dumb

In my years of doing PCB design/layout (granted, as an amateur) I was
not aware that you could use the average power to determine trace
width. This makes everything MUCH easier.

Boy that saved me a lot of aggravation. Thanks gents!

 

[DJ Delorie]

What matters is average power, so make that
Ipulse * sqrt(duty cycle).

Why? Assuming it's a square wave, won't it be either full power or no
power?

 

[Fred Bartoli]

DJ Delorie a écrit :

Why? Assuming it's a square wave, won't it be either full power or no
power?

Well, in fact it depends on the time scale.

If your frequency is high enough (WRT PCB thermal inertia) then it's
average power that matters and you use Ipk*sqrt(duty cycle).

If your frequency is low enough (WRT PCB thermal inertia) then it's peak
power that matters and you use Ipk.

If your frequency is on par with PCB thermal inertia then it's up to you
to be clever

 

[nospam]

Fred Bartoli

DJ Delorie a écrit :

Well, in fact it depends on the time scale.

If your frequency is high enough (WRT PCB thermal inertia) then it's
average power that matters and you use Ipk*sqrt(duty cycle).

No it isn't.

For a square ware with given peak current losses are directly proportional
to the duty cycle.

Pav = R * Ipk^2 * dt

For a square wave with given average current losses are proportional to the
reciprocal of the duty cycle.

Pav = R * Iav^2 / dt




--

 

[Fred Bartoli]

nospam a écrit :

Fred Bartoli


No it isn't.

Uhh?
Power is linked to Irms.

For a square ware with given peak current losses are directly proportional
to the duty cycle.

Pav = R * Ipk^2 * dt

So Irms, which gives the average power is Ipk*sqrt(duty), which is
exactly what I wrote.

For a square wave with given average current losses are proportional to the
reciprocal of the duty cycle.

Pav = R * Iav^2 / dt

Which is exactly the same thing, written differently.


So?

 

[Rich Grise]

On Thu, 16 Nov 2006 20:31:20 -0800, ferrari.secret.santa wrote:
[about high-current traces]

Any other ideas? Routing this board is driving me nuts!

Can you just order thicker copper plating?

Good Luck!
Rich

 

[DJ Delorie]

Power is linked to Irms.

Consider a 2A feed at 50% duty cycle. Imax = 2

Square Imax = 4

At a 50% duty cycle, the mean is 2.

Sqrt(2) = 1.414

Ok, the math makes sense, but *why* is power linked to Irms and not
Iavg ?

 

[nospam]

Fred Bartoli

Uhh?
Power is linked to Irms.

1A peak, 1 ohm, 50% dt

Pav = 1 * 1^2 * 0.5 = 0.5

So Irms, which gives the average power is Ipk*sqrt(duty), which is
exactly what I wrote.

Pav = 1 * sqrt(0.5) = 0.707

which is right?
--

 

[Fred Bartoli]

nospam a écrit :

Fred Bartoli


1A peak, 1 ohm, 50% dt

Pav = 1 * 1^2 * 0.5 = 0.5


Pav = 1 * sqrt(0.5) = 0.707

No.
Where did you see that Pav = R*Irms ?

Pav is R * Irms^2
thus
Pav = 1 * sqrt(0.5)^2 = 0.5

QED.

which is right?

Me, I guess

 

[jasen]

Ok, the math makes sense, but *why* is power linked to Irms and not
Iavg ?

integrate I*I*R

 

[Adam S]

Duty cycle is 1/10th for each row

ha ? Wouldn't he be running at a duty cycle of 1/7 = 14.2% (ignoring any
display blanking time) thereby giving RMS current through the common pin
on each display, at

sqrt(1/7)*5*7*100mA = 1.32A ?

 

[David Brown]

I am building a display consisting of a series of seven 5x7 LED dot
matrix displays, butted up against one another. The displays are of
the 0.7" variety (about as small as they come). I will be driving them
with PWM to control brightness, using shift registers to control the 35
horizontal elements, and switching the 7 rows sequentially to paint the
display. The pulse current on each dot is 100ma, and times 35
horizontal dots, that's a potential max of 3.5A.

Problem is, I am trying to keep the board small. The traces required
to handle 3.5A are pretty fat - too fat to allow the close spacing I
need for the project.

Anyone have any tips?

Some ideas....

I could mount the through-hole displays in DIP to SMT adapters and
surface mount them, freeing up the back of the board to route my
traces. Downside is cost and increased complexity, and the board would
be thicker

I can seperate out the segments into 2, 2 and 3 and they'd be 1A, 1A,
1.5A, which I can fit the traces. However now I am faced with routing
three fat traces to each of my power transistors that switch the rows,
and I'd definitely have to increase the board size to accomodate

I can use a 4-layer board... probably the most suitable solution, but
more expensive

I am already putting all my shift registers and microcontroller on a
sub-board, so I've trimmed the components on the display to the bare
minimum.

Any other ideas? Routing this board is driving me nuts!

Thanks!

Corp.

There are two things you have to take into account with low-frequency,
high current lines. One is DC resistive voltage drop, and the other is
heating. For the first issue, peak currents are the main thing to look
at. Depending on the application, you might be able to improve on that
by putting your drivers closer to where they are needed, and/or using
capacitors to store charge locally (i.e., think of you system as a
series of unregulated switch mode power supplies). Other than that, the
tracks should be as thick and straight as possible, with multiple tracks
on different layers.

For the heat issue, it's the average current that is most important.
There are also plenty of tricks that can be used to improve heat
dissipation - splitting the track in two and running each half on a
different board layer (especially the outer layers), using polygon pours
where there is space, adding extra tracks that don't carry current
anywhere but act as cooling fins, and no solder mask so that the tracks
get a layer of solder when you produce the card (solder is not nearly as
good a heat conductor as the copper, even with a thin track, but will
give you better air cooling).

 

[CWatters]

I am building a display consisting of a series of seven 5x7 LED dot
matrix displays, butted up against one another. The displays are of
the 0.7" variety (about as small as they come). I will be driving them
with PWM to control brightness, using shift registers to control the 35
horizontal elements, and switching the 7 rows sequentially to paint the
display. The pulse current on each dot is 100ma, and times 35
horizontal dots, that's a potential max of 3.5A.

Problem is, I am trying to keep the board small. The traces required
to handle 3.5A are pretty fat - too fat to allow the close spacing I
need for the project.

Perhaps use bus bars. Strips of plated copper with legs. They stand
vertically and can be bent to go around corners.