The input voltage of the ADC chip

[Jimbo bob]

Hi everyone ,

This is probably really trivial, but I could not find an explanation on it. I have attached a section of the PDF data sheet for an ADC chip (ADS1242). On page 2 of the data sheet there is a rectangular box with the title "ABSOLUTE MAXIMUM RATINGS". In that box, in front of "AIN " it is written " GND -0.5V to VDD +0.5V ". I can think of two or maybe three ways to interpret that and I find it a little bit ambiguous due to my lack of experience.

Any help is greatly appreciated

 

[Harald Kapp]

Absolute max. ratings are specs that shall not be exceeded. Otherwise destruction of the chip may result.
Absolute max. ratings do not mean that the chip will operate reaonably if the normal operating conditions are exceeded but max. ratings are not yet reached.

In the case of this ADC this means that the analog input voltage shall range between GND-0.1V...VDD+0.1V (Buffer off) or GND+0.05V...VCC-1.5V (Buffer on) for normal operation (datasheet, page 3).
Take for example Bufffer off: Any voltage between GND-0.5V...GND-0.1V or VDD+0.1V...VVDD+0.5V will not lead to reasonable ADC-results, but will not destroy the chip.

 

[Jimbo bob]

Absolute max. ratings are specs that shall not be exceeded. Otherwise destruction of the chip may result.
Absolute max. ratings do not mean that the chip will operate reaonably if the normal operating conditions are exceeded but max. ratings are not yet reached.

In the case of this ADC this means that the analog input voltage shall range between GND-0.1V...VDD+0.1V (Buffer off) or GND+0.05V...VCC-1.5V (Buffer on) for normal operation (datasheet, page 3).
Take for example Bufffer off: Any voltage between GND-0.5V...GND-0.1V or VDD+0.1V...VVDD+0.5V will not lead to reasonable ADC-results, but will not destroy the chip.

Cheers Harald . So if I were to supply +5V from VDD to GND (i.e. GND = 0V and VDD = 5V), I can input 0V-0.1V....5V+0.1V (Buffer off) as the ADC's full scale, correct? When you mentioned "will not lead to reasonable results, did you say that because the full voltage scale of ADC was not used?

 

[Harald Kapp]

When you mentioned "will not lead to reasonable results, did you say that because the full voltage scale of ADC was not used?

Right.

 

[hevans1944]

What @Harald Kapp said. This device digitizes a single-ended analog input that nominally varies between GND and Vdd when PGA=1. Higher gain values will require a narrower input voltage range. See the datasheet. The ADC can also be used with differential inputs (the most likely application to minimize common mode artifacts and take advantage of ratiometric conversion by exciting the bridge with + and - reference voltages) so that positive AND negative differential signals can be measured, like from a load-cell bridge. Note however, the magnitude of either differential input must still lie between 0 and Vdd. You can also use the onboard offset DAC (ODAC) to offset the differential inputs, sometimes allowing improved resolution. Google TI application report SBAA077 for details.

 

[Jimbo bob]

Hi again,

I know it has been a while, but I thought instead of making a new thread, I ask a relevant question here. To clarify, this is still related to the input of a specific ADC, but now there are a few more variable involved.
I am planning to use an AD7730L analogue to digital converter (ADC) chip, with a quarter bridge circuit. Everything was on the track until I realised something, which indicated that things were perhaps not on the track as much as I thought after all. Basically, I forgot to take into account the fact that I have a quarter bridge with a strain gauge not a load cell. This means that I also need to think about the cases where I have negative output voltages from my bridge (this is embarrassing because the previous posts, particularly hevans 1944 in the previous post does warn me about this) .
I thought that the easiest way to go around this is to use an inverting Op amp or a voltage divider and a buffer before the analogue input terminals of the ADC. Does anyone know of a chip which inverts only negative voltages to their equivalent positive voltage and also send a signal (i.e. set a digital output high or low) to indicate when it inverts a negative voltage? I am thinking of feeding this output to my micro-controller input and account for it in software (i.e. indicate that there was a compression on the strain gauge).

The alternative way (based on what I understood from AD7730L’s data sheet and considering that I am using a 2.5V reference voltage chip ADR431), is for me to supply a negative voltage to the AGND pin (analogue ground) which needs to be smaller than -1.2V (because the absolute input voltage range as mentioned on page 24 of the AD7730 data sheet is AGND+1.2V to AVDD-0.95V and the differential between AVDD or DVDD with AGND must not exceed 5.5V). Therefore, I think I have to go with the setting on page 42 of the data sheet. This means DVDD has to change and all the digital logic inputs to the AD7730 should be levelled down and my 2.5V reference excitation voltage will also disappear and some extra components will come into action. I am not completely sure if I am correct, but I think the first way is easier than the second one, but I am not really sure how much noise and inaccuracy it will introduce, but I think it may be more than the second approach.

Please find attached the relevant schematics.

Any help and guidance is much much appreciated